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STM32U375CE Datasheet(PDF) 13 Page - STMicroelectronics

Part # STM32U375CE
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 144 DMIPS, 1 MB flash memory, 256 KB SRAM, SMPS
PDF  222 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U375CE Datasheet(HTML) 13 Page - STMicroelectronics

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The BOOT0 value comes from the PH3-BOOT0 (PB7-BOOT0 for STM32U375CG) pin or from an option bit
depending on the value of a user option bit to free the GPIO pad if needed.
The bootloader is located in the system memory, programmed by ST during production. The bootloader is used to
reprogram the flash memory by using USART, I2C, SPI, FDCAN, or USB FS in device mode through the DFU
(device firmware upgrade).
The bootloader is available on all devices. Refer to the application note STM32 microcontroller system memory
boot mode (AN2606) for more details.
The embedded RSS are located in the secure information block, programmed by ST during production.
For example, the RSS enable the SFI (secure firmware installation), thanks to the RSSe SFI (RSS extension
firmware).
This feature allows the customer to produce the confidentiality of the firmware to be provisioned into the STM32,
when production is sub-contracted to untrusted third-party.
The RSS are available on all devices, after enabling the TrustZone® through the TZEN option bit. Refer to the
application note overview secure firmware install (SFI) (AN4992) for more details.
Refer to Table 4 and Table 5 for boot modes when TrustZone® is disabled and enabled respectively.
Table 4. Boot modes when TrustZone® is disabled (TZEN = 0)
NBOOT0
BOOT0
pin
NSWBOOT0
Boot address option-byte
selection
Boot area
ST programmed
default value
-
0
1
ADD[24:0] in
FLASH_BOOT0R
Nonsecure boot base address 0 defined by user
option bytes in FLASH_BOOT0R
Flash: 0x0800 0000
-
1
1
ADD[24:0] in
FLASH_BOOT1R
Nonsecure boot base address 0 defined by user
option bytes in FLASH_BOOT1R
Bootloader: 0x0BF8
F000
1
-
0
ADD[24:0] in
FLASH_BOOT0R
Nonsecure boot base address 0 defined by user
option bytes in FLASH_BOOT0R
Flash: 0x0800 0000
0
-
0
ADD[24:0] in
FLASH_BOOT1R
Nonsecure boot base address 0 defined by user
option bytes in FLASH_BOOT1R
Bootloader: 0x0BF8
F000
When TrustZone® is enabled by setting the TZEN option bit, the boot space must be in the secure area. The
ADD[24:0] option bytes in FLASH_SBOOT0R register option bytes are used to select the boot secure memory
address.
A unique boot entry option can be selected by setting the BOOT_LOCK option bit, allowing to boot always at the
secure base boot address selected by user option bytes. All other boot options are ignored.
Table 5. Boot modes when TrustZone® is enabled (TZEN = 1)
BOOT_
LOCK
NBOOT0
BOOT0
pin
NSWBOOT0
RSS
command
Boot address option-
byte selection
Boot area
ST programmed
default value
0
-
0
1
0
ADD[24:0] in
FLASH_SBOOT0R
Secure boot base address 0
defined by user option bytes in
FLASH_SBOOT0R
Flash:
0x0C00 0000
-
1
1
0
N/A
RSS
RSS:
0x0FF8 0000
1
-
0
0
ADD[24:0] in
FLASH_SBOOT0R
Secure boot base address 0
defined by user option bytes in
FLASH_SBOOT0R
Flash:
0x0C00 0000
0
-
0
0
N/A
RSS
RSS:
0x0FF8 0000
-
-
-
≠0
N/A
RSS
RSS:
0x0FF8 0000
1
-
-
-
-
ADD[24:0] in
FLASH_SBOOT0R
Secure boot base address 0
defined by user option bytes in
FLASH_SBOOT0R
Flash:
0x0C00 0000
STM32U375xx
Functional overview
DS14861 - Rev 2
page 13/222



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