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STM32U375CE Datasheet(PDF) 47 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 222 page  • Programmable data word length (7 or 8 or 9 bits) • Programmable data order with MSB-first or LSB-first shifting • Configurable stop bits (1 or 2 stop bits) • Single-wire half-duplex communications • Continuous communications using DMA • Received/transmitted bytes are buffered in reserved SRAM using centralized DMA • Separate enable bits for transmitter and receiver • Separate signal polarity control for transmission and reception • Swappable Tx/Rx pin configuration • Hardware flow control for modem and RS-485 transceiver • Transfer detection flags: – Receive buffer full – Transmit buffer empty – Busy and end of transmission flags • Parity control: – Transmits parity bit – Checks parity of received data byte • Four error detection flags: – Overrun error – Noise detection – Frame error – Parity error • Interrupt sources with flags • Multiprocessor communications: Wake-up from Mute mode by idle line detection or address mark detection • Autonomous functionality in Stop mode with wake-up from Stop capability Table 15. USART and LPUART features Modes/features USART1/3 UART4/5 LPUART1 Hardware flow control for modem X X X Continuous communication using DMA X X X Multiprocessor communication X X X Synchronous SPI mode (master/slave) X - - Smartcard mode X - - Single-wire half-duplex communication X X X IrDA SIR ENDEC block X X - LIN mode X X - Dual-clock domain and wake-up from low power X X X Receiver timeout interrupt X X - Modbus communication X X - Auto-baud rate detection X X - Driver enable X X X USART data length 7, 8, and 9 bits Tx/Rx FIFO X X X Tx/Rx FIFO size 8 bytes Autonomous in Stop 0 and Stop 1 mode with wake-up capability X X X Autonomous in Stop 2 mode with wake-up capability - - X STM32U375xx Functional overview DS14861 - Rev 2 page 47/222 |
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