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STM32U375CE Datasheet(PDF) 15 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 222 page ![]() Table 7. Example of memory map security attribution versus SAU configuration regions Region description Address range IDAU security attribution SAU security attribution typical configuration Final security attribution Code external memories 0x0000 0000 0x07FF FFFF Nonsecure Secure or nonsecure or NSC (1) Secure or nonsecure or NSC Code flash and SRAM 0x0800 0000 0x0BFF FFFF Nonsecure 0x0C00 0000 0x0FFF FFFF NSC Secure or NSC Secure or NSC Code external memories 0x1000 0000 0x17FF FFFF Nonsecure 0x1800 0000 0x1FFF FFFF SRAM 0x2000 0000 0x2FFF FFFF 0x3000 0000 0x3FFF FFFF NSC Secure or NSC Secure or NSC Peripherals 0x4000 0000 0x4FFF FFFF Nonsecure 0x5000 0000 0x5FFF FFFF NSC Secure or NSC Secure or NSC External memories 0x6000 0000 0xDFFF FFFF Nonsecure Secure or nonsecure or NSC Secure or nonsecure or NSC 1. NSC = nonsecure callable. 3.7.2 TrustZone®peripheral classification When the TrustZone® security is active, a peripheral can be either securable or TrustZone®-aware type as follows: • Securable: peripheral protected by an AHB/APB firewall gate that is controlled from TZSC to define security properties • TrustZone®-aware: peripheral connected directly to AHB or APB bus and implementing a specific TrustZone® behavior such as a subset of registers being secure 3.7.3 Default TrustZone® security state The default system security state is detailed below: • CPU: – Cortex®-M33 is in a secure state after reset. The boot address must be in a secure address. • Memory map: – SAU is fully secure after reset. Consequently, all memory map is fully secure. Up to eight SAU configurable regions are available for security attribution. • Flash memory: – Flash memory security area is defined by watermarking user options. – Flash memory block-based area is nonsecure after reset. • SRAMs: – All SRAMs are secure after reset. MPCBBx (memory protection block-based controllers) are secure. STM32U375xx Functional overview DS14861 - Rev 2 page 15/222 |
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