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STM32U375CE Datasheet(PDF) 212 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 212 Page - STMicroelectronics |
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212 / 222 page ![]() Contents 1 Introduction .......................................................................4 2 Description ........................................................................5 3 Functional overview ...............................................................9 3.1 Arm®Cortex®-M33 core with TrustZone® and FPU................................... 9 3.2 Instruction cache (ICACHE)...................................................... 9 3.3 Memory protection unit ......................................................... 10 3.4 Embedded flash memory ....................................................... 10 3.4.1 TrustZone® security ..................................................... 12 3.4.2 Privilege protection ...................................................... 12 3.5 Embedded SRAM ............................................................. 12 3.5.1 TrustZone® security ..................................................... 12 3.5.2 Privilege protection ...................................................... 12 3.6 Boot modes .................................................................. 12 3.7 Global TrustZone® controller (GTZC) ............................................. 14 3.7.1 TrustZone® security architecture ............................................ 14 3.7.2 TrustZone®peripheral classification.......................................... 15 3.7.3 Default TrustZone® security state ........................................... 15 3.8 Power supply management ..................................................... 16 3.8.1 Power supply schemes ................................................... 16 3.8.2 Power supply supervisor .................................................. 20 3.8.3 Reset mode ........................................................... 20 3.8.4 VBAT operation......................................................... 21 3.8.5 PWR TrustZone® security ................................................. 21 3.9 Low-power modes............................................................. 21 3.9.1 Autonomous peripherals .................................................. 23 3.10 Peripheral interconnect matrix ................................................... 26 3.11 Reset and clock controller (RCC) ................................................ 26 3.11.1 RCC TrustZone®security.................................................. 28 3.12 Clock recovery system (CRS) ................................................... 28 3.13 General-purpose inputs/outputs (GPIO)........................................... 28 3.13.1 GPIOs TrustZone® security................................................ 28 3.14 Multi-AHB bus matrix .......................................................... 28 3.15 General purpose direct memory access controller (GPDMA) ......................... 29 3.16 Interrupts and events .......................................................... 30 STM32U375xx Contents DS14861 - Rev 2 page 212/222 |
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