TMS320VC5505 datasheet(40/135 Pages) TI

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TMS320VC5505

SPRS503B – JUNE 2009 – REVISED JANUARY 2010

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4.3.1

Clock Configurations After Device Reset

After reset, the on-chip Bootloader programs the system clock generator based on the input clock selected

via the CLK_SEL pin. If CLK_SEL = 0, the Bootloader programs the system clock generator and sets the

system clock to 12.288 MHz (multiply the 32.768-kHz RTC oscillator clock by 375). If CLK_SEL = 1, the

Bootloader bypasses the system clock generator altogether and the system clock is driven by the CLKIN

pin. In this case, the CLKIN frequency is expected to be 11.2896 MHz, 12.0 MHz, or 12.288 MHz. While

the bootloader tries to boot from the USB (currently not supported), the clock generator will be

programmed to output approximately 36 MHz.

4.3.1.1

Device Clock Frequency

After the boot process is complete, the user is allowed to re-program the system clock generator to bring

the device up to the desired clock frequency and the desired peripheral clock state (clock gating or not).

The user must adhere to various clock requirements when programming the system clock generator. For

more information, see Section 6.5, Clock PLLs.

Note: The on-chip Bootloader allows for DSP registers to be configured during the boot process.

However, this feature must not be used to change the output frequency of the system clock generator

during the boot process. Timer0 is also used by the bootloader to allow for 200 ms of BG_CAP settling

time. The bootloader register modification feature must not modify the Timer0 registers.

4.3.1.2

Peripheral Clock State

The clock and reset state of each of peripheral is controlled through a set of system registers. The

peripheral clock gating control registers (PCGCR1 and PCGCR2) are used to enable and disable

peripheral clocks. The peripheral software reset counter register (PSRCR) and the peripheral reset control

At hardware reset, all of the peripheral clocks are off to conserve power. After hardware reset, the DSP

boots via the bootloader code in ROM. During the boot process, the bootloader queries each peripheral to

determine if it can boot from that peripheral. At that time, the individual peripheral clocks will be enabled

for the query and then disabled again when the bootloader is finished with the peripheral. By the time the

bootloader releases control to the user code, all peripheral clocks will be off and all domains in the ICR,

except the CPU domain, will be idled.

4.3.1.3

USB Oscillator Control

The USB oscillator is controlled through the USB system control register (USBSCR). To enable the

oscillator, the USBOSCDIS and USBOSCBIASDIS bits must be cleared to 0. The user must wait until the

USB oscillator stabilizes before proceeding with the USB configuration. The USB oscillator stabilization

time is 100 ms, typically with a 10 ms maximum (Note: the startup time is highly dependent on the ESR

and capacitive load on the crystal).

Device Configuration

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