TMS320VC5505 datasheet(47/135 Pages) TI

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TMS320VC5505

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SPRS503B – JUNE 2009 – REVISED JANUARY 2010

4.6.4

Pull-up/Pull-down Inhibit Registers (PDINHIBR1/2/3) [1C17h, 1C18h, and 1C19h,

respectively]

Each internal pullup and pulldown (IPU/IPD) resistor on the VC5505 DSP, except for the IPD on TRST,

can be individually controlled through the IPU/IPD registers (PDINHIBR1 [1C17h] , PDINHIBR2 [1C18h],

and PDINHIBR3 [1C19h]). To minimize power consumption, internal pullup or pulldown resistors should

be disabled in the presence of an external pullup or pulldown resistor or external driver. Section 4.8.1,

Pullup/Pulldown Resistors, describes other situations in which an pullup and pulldown resistors are

required.

4.6.5

Output Slew Rate Control Register (OSRCR) [1C16h]

To provide the lowest power consumption setting, the DSP has configurable slew rate control on the EMIF

and CLKOUT output pins. The output slew rate control register (OSRCR) is used to set a subset of the

device I/O pins to either fast or slow slew rate. The slew rate feature is implemented by staging/delaying

turn-on times of the parallel p-channel drive transistors and parallel n-channel drive transistors of the

output buffer. In the slow slew rate configuration, the delay is longer, but ultimately the same number of

parallel transistors are used to drive the output high or low. Thus, the drive strength is ultimately the same

strength. The slower slew rate control can be used for power savings and has the greatest effect at lower

VDD_IO voltages.

Device Configuration

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TMS320VC5505 Datasheet(PDF) 47 Page - Texas Instruments