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CP3SP33SMS/NOPB Datasheet(PDF) 196 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 196 Page - Texas Instruments

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CP3SP33
SNOSCW5 – MAY 2013
www.ti.com
Table 22-7. CAN Controller Registers (continued)
NAME
ADDRESS
DESCRIPTION
BMSKX1
FF BE10h
CAN1 Basic Mask Register
BMSKB0
FF BA14h
CAN0 Basic Mask Register
BMSKB1
FF BE14h
CAN1 Basic Mask Register
CIEN0
FF BA18h
CAN0 Interrupt Enable Register
CIEN1
FF BE18h
CAN1 Interrupt Enable Register
CIPND0
FF BA1Ch
CAN0 Interrupt Pending Register
CIPND1
FF BE1Ch
CAN1 Interrupt Pending Register
CICLR0
FF BA20h
CAN0 Interrupt Clear Register
CICLR1
FF BE20h
CAN1 Interrupt Clear Register
CICEN0
FF BA24h
CAN0 Interrupt Code Enable Register
CICEN1
FF BE24h
CAN1 Interrupt Code Enable Register
CSTPND0
FF BA28h
CAN0 Status Pending Register
CSTPND1
FF BE28h
CAN1 Status Pending Register
CANEC0
FF BA2Ch
CAN0 Error Counter Register
CANEC1
FF BE2Ch
CAN1 Error Counter Register
CEDIAG0
FF BA30h
CAN0 Error Diagnostic Register
CEDIAG1
FF BE30h
CAN1 Error Diagnostic Register
CTMR0
FF BA34h
CAN0 Timer Register
CTMR1
FF BE34h
CAN1 Timer Register
22.10.1 Message Buffer Status/Control Register (CNSTAT)
The buffer status (ST), the buffer priority (PRI), and the data length code (DLC) are controlled by
manipulating the contents of the Buffer Status/Control Register (CNSTAT). The CPU and CAN module
have access to this register.
15
12 11
8 7
4 3
0
DLC
Reserved
PRI
ST
0
R/W
ST
The Buffer Status field contains the status information of the buffer as shown in Table 22-8. This
field can be modified by the CAN module. The ST0 bits acts as a buffer busy indication. When
the BUSY bit is set, any write access to the buffer is disabled with the exception of the lower byte
of the CNSTAT register. The CAN module sets this bit if the buffer data is currently copied from
the hidden buffer or if a message is scheduled for transmission or is currently transmitting. The
CAN module always clears this bit on a status update.
Table 22-8. Buffer Status Section of the CNSTAT Register
ST3
ST0
ST2
ST1
BUFFER STATUS
(DIR)
(BUSY)
0
0
0
0
RX_NOT_ACTIVE
0
0
0
1
Reserved for RX_BUSY. (This condition indicates that software wrote RX_NOT_ACTIVE to a buffer
when the data copy process is still active.)
0
0
1
0
RX_READY
0
0
1
1
RX_BUSY0 (Indicates data is being copied for the first time RX_READY
→ RX_BUSY0.)
0
1
0
0
RX_FULL
0
1
0
1
RX_BUSY1 (Indicates data is being copied for the second time RX_FULL
→ RX_BUSY1.)
0
1
1
0
RX_OVERRUN
0
1
1
1
RX_BUSY2 (Indicates data is being copied for the third or subsequent times RX_OVERRUN
→
RX_BUSY2.)
196
Dual CAN Interfaces
Copyright © 2013, Texas Instruments Incorporated
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