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R5F10WMDA Datasheet(PDF) 67 Page - Renesas Technology Corp |
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R5F10WMDA Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 126 page  RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C) R01DS0168EJ0210 Rev.2.10 Aug 12, 2016 Page 67 of 123 (2) 1/4 bias method (TA = −40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit LCD output voltage variation range VL1 C1 to C5Note 1 = 0.47 μFNote 2 VLCD = 04H 0.90 1.00 1.08 V VLCD = 05H 0.95 1.05 1.13 V VLCD = 06H 1.00 1.10 1.18 V VLCD = 07H 1.05 1.15 1.23 V VLCD = 08H 1.10 1.20 1.28 V VLCD = 09H 1.15 1.25 1.33 V VLCD = 0AH 1.20 1.30 1.38 V Doubler output voltage VL2 C1 to C5Note 1 = 0.47 μF 2 VL1 −0.08 2 VL1 2 VL1 V Tripler output voltage VL3 C1 to C5Note 1 = 0.47 μF 3 VL1 −0.12 3 VL1 3 VL1 V Quadruply output voltage VL4 C1 to C5Note 1 = 0.47 μF 4 VL1 −0.16 4 VL1 4 VL1 V Reference voltage setup timeNote 2 tVWAIT1 5 ms Voltage boost wait timeNote 3 tVWAIT2 C1 to C5Note 1 = 0.47 μF 500 ms Notes 1. This is a capacitor that is connected between voltage pins used to drive the LCD. C1: A capacitor connected between CAPH and CAPL C2: A capacitor connected between VL1 and GND C3: A capacitor connected between VL2 and GND C4: A capacitor connected between VL3 and GND C5: A capacitor connected between VL4 and GND C1 = C2 = C3 = C4 = C5 = 0.47 μF ± 30% 2. This is the time required to wait from when the reference voltage is specified by using the VLCD register (or when the internal voltage boosting method is selected (by setting the MDSET1 and MDSET0 bits of the LCDM0 register to 01B) if the default value reference voltage is used) until voltage boosting starts (VLCON = 1). 3. This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled (LCDON = 1). 2.7.3 Capacitor split method (1) 1/3 bias method (TA = −40 to +85°C, 2.2 V ≤ VD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit VL4 voltage VL4 C1 to C4 = 0.47 μFNote 2 VDD V VL2 voltage VL2 C1 to C4 = 0.47 μFNote 2 2/3 VL4 − 0.1 2/3 VL4 2/3 VL4 + 0.1 V VL1 voltage VL1 C1 to C4 = 0.47 μFNote 2 1/3 VL4 − 0.1 1/3 VL4 1/3 VL4 + 0.1 V Capacitor split wait timeNote 1 tVWAIT 100 ms Notes 1. This is the wait time from when voltage bucking is started (VLCON = 1) until display is enabled (LCDON = 1). 2. This is a capacitor that is connected between voltage pins used to drive the LCD. C1: A capacitor connected between CAPH and CAPL C2: A capacitor connected between VL1 and GND C3: A capacitor connected between VL2 and GND C4: A capacitor connected between VL4 and GND C1 = C2 = C3 = C4 = 0.47 μF ± 30% |
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