R5F10WMDA datasheet(92/126 Pages) RENESAS

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RL78/L13

3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA =

−40 to +105°C)

R01DS0168EJ0210 Rev.2.10

Aug 12, 2016

Page 92 of 123

(3) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input)

(TA =

−40 to +105°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter

Symbol

Conditions

HS (high-speed main) Mode

Unit

MIN.

MAX.

SCKp cycle timeNote 5

tKCY2

4.0 V

≤ VDD ≤ 5.5 V

fMCK > 20 MHz

16/fMCK

fMCK

≤ 20 MHz

12/fMCK

2.7 V

≤ VDD ≤ 5.5 V

fMCK > 16 MHz

16/fMCK

fMCK

≤ 16 MHz

12/fMCK

2.4 V

≤ VDD ≤ 5.5 V

12/fMCK and 1000

SCKp high-/low-level width

tKH2, tKL2 4.0 V

≤ VDD ≤ 5.5 V

tKCY2/2

−14

2.7 V

≤ VDD ≤ 5.5 V

tKCY2/2

−16

2.4 V

≤ VDD ≤ 5.5 V

tKCY2/2

−36

SIp setup time

(to SCKp

↑)Note 1

tSIK2

2.7 V

≤ VDD ≤ 5.5 V

1/fMCK+40

2.4 V

≤ VDD ≤ 5.5 V

1/fMCK+60

SIp hold time

(from SCKp

↑)Note 2

tKSI2

1/fMCK+62

Delay time from SCKp

↓ to

SOp outputNote 3

tKSO2

C = 30 pFNote 4

2.7 V

≤ VDD ≤ 5.5 V

2/fMCK+66

2.4 V

≤ VDD ≤ 5.5 V

2/fMCK+113

Notes 1.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to SCKp

↓”

when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from SCKp

↓”

when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output becomes

“from SCKp

↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

C is the load capacitance of the SOp output lines.

Transfer rate in SNOOZE mode: MAX. 1 Mbps

Caution

Select the normal input buffer for the SIp pin and SCKp pin and the normal output mode for the SOp pin

by using port input mode register g (PIMg) and port output mode register g (POMg).

Remarks 1.

p: CSI number (p = 00, 10), m: Unit number (m = 0), n: Channel number (n = 0, 2),

g: PIM number (g = 0, 1)

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,

n: Channel number (mn = 00, 02))

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