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R5F10WMDA Datasheet(PDF) 11 Page - Renesas Technology Corp

Part # R5F10WMDA
Description  Ultra-low power consumption technology
PDF  126 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10WMDA Datasheet(HTML) 11 Page - Renesas Technology Corp

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RL78/L13
1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 11 of 123
(2/2)
Item
64-pin
80-pin
R5F10WLx (x = A, C-G)
R5F10WMx (x = A, C-G)
Clock output/buzzer output controller
2
• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(Main system clock: fMAIN = 20 MHz operation)
• 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz
(Subsystem clock: fSUB = 32.768 kHz operation)
8/10-bit resolution A/D converter
9 channels
12 channels
Comparator
2 channels
Serial interface
[64-pin]
• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
• UART: 1 channel
[80-pin]
• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
• UART: 2 channels
I2C bus
1 channel
LCD controller/driver
Internal voltage boosting method, capacitor split method, and external resistance division
method are switchable.
Segment signal output
36 (32)Note 1
51 (47)Note 1
Common signal output
4 (8)Note 1
Multiplier and divider/multiply-
accumulator
• 16 bits × 16 bits = 32 bits (Unsigned or signed)
• 32 bits ÷ 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
DMA controller
4 channels
Vectored
interrupt sources
Internal
32
35
External
11
11
Key interrupt
5
8
Reset
• Reset by RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-reset
• Internal reset by voltage detector
• Internal reset by illegal instruction executionNote 2
• Internal reset by RAM parity error
• Internal reset by illegal-memory access
Power-on-reset circuit
• Power-on-reset:
1.51 V (TYP.)
• Power-down-reset: 1.50 V (TYP.)
Voltage detector
• Rising edge: 1.67 V to 4.06 V (14 steps)
• Falling edge: 1.63 V to 3.98 V (14 steps)
On-chip debug function
Provided
Power supply voltage
VDD = 1.6 to 5.5 V (TA = -40 to +85°C)
VDD = 2.4 to 5.5 V (TA = -40 to +105°C)
Operating ambient temperature
Consumer applications: TA =
−40 to +85°C
Industrial applications: TA =
−40 to +105°C
Notes 1.
The values in parentheses are the number of signal outputs when 8 com is used.
2.
This reset occurs when instruction code FFH is executed.
This reset does not occur during emulation using an in-circuit emulator or an on-chip debugging emulator.



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