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R5F10WMDA Datasheet(PDF) 29 Page - Renesas Technology Corp |
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R5F10WMDA Datasheet(HTML) 29 Page - Renesas Technology Corp |
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29 / 126 page  RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C) R01DS0168EJ0210 Rev.2.10 Aug 12, 2016 Page 29 of 123 Note Operation is not possible if 1.6 V ≤ VDD < 1.8 V in LV (low-voltage main) mode while the system is operating on the subsystem clock. Remark fMCK: Timer array unit operation clock frequency (Operation clock to be set by the CKSmn0, CKSmn1 bits of timer mode register mn (TMRmn) m: Unit number (m = 0), n: Channel number (n = 0 to 7)) Minimum Instruction Execution Time during Main System Clock Operation TCY vs VDD (HS (high-speed main) mode) 1.0 0.1 0 10 1.0 2.0 3.0 4.0 5.0 6.0 5.5 2.7 0.01 2.4 0.0417 0.0625 0.05 When the high-speed on-chip oscillator clock is selected During self programming When high-speed system clock is selected Supply voltage VDD [V] |
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