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STC12LE5616AD Datasheet(PDF) 131 Page - STCmicro Technology Co,.Ltd |
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STC12LE5616AD Datasheet(HTML) 131 Page - STCmicro Technology Co,.Ltd |
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131 / 377 page ![]() T1x12 : Timer 1 clock source bit. 0 : The clock source of Timer 1 is SYSclk/12. It will compatible to the traditional 80C51 MCU 1 : The clock source of Timer 1 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU T0x12 : Timer 0 clock source bit. 0 : The clock source of Timer 0 is SYSclk/12. It will compatible to the traditional 80C51 MCU 1 : The clock source of Timer 0 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU 2. Interrupt Priority control Registers IP and IPH Each interrupt source of STC12C5620AD all can be individually programmed to one of four priority levels by setting or clearing the bits in Special Function Registers IP and IPH. A low-priority interrupt can itself be interrupted by a high-pority interrupt, but not by another low-priority interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source. IPH: Interrupt Priority High Register (Non bit-addressable) SFR name Address bit B7 B6 B5 B4 B3 B2 B1 B0 IPH B7H name - PPCA_LVDH PADC_SPIH PSH PT1H PX1H PT0H PX0H IP: Interrupt Priority Register (Bit-addressable) SFR name Address bit B7 B6 B5 B4 B3 B2 B1 B0 IP B8H name - PPCA_LVD PADC_SPI PS PT1 PX1 PT0 PX0 PPCA_LVDH, PPCA_LVD: Programmable Counter Array (PCA) and Low voltage detector interrupt priority control bits. if PPCA_LVDH=0 and PPCA_LVD=0, Programmable Counter Array (PCA) and Low voltage detector interrupt are assigned lowest priority(priority 0). if PPCA_LVDH=0 and PPCA_LVD=1, Programmable Counter Array (PCA) and Low voltage detector interrupt are assigned lowest priority(priority 1). if PPCA_LVDH=1 and PPCA_LVD=0, Programmable Counter Array (PCA) and Low voltage detector interrupt are assigned lowest priority(priority 2). if PPCA_LVDH=1 and PPCA_LVD=1, Programmable Counter Array (PCA) and Low voltage .detector interrupt are assigned lowest priority(priority 3). PADC_SPIH, PADC_SPI : Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt priority control bits. if PADC_SPIH=0 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt are assigned lowest priority(priority 0). if PADC_SPIH=0 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt are assigned lowest priority(priority 1). if PADC_SPIH=1 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt are assigned lowest priority(priority 2). if PADC_SPIH=1 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt are assigned lowest priority(priority 3). 131 |
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