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STM32U375CE Datasheet(PDF) 153 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 153 Page - STMicroelectronics |
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153 / 222 page  Symbol Parameter Conditions Min Typ Max Unit IDDA(DAC) DAC consumption from VDDA DAC output buffer ON No load, middle code (0x800) - 330 510 µA No load, worst code (0xF1C) - 470 680 DAC output buffer OFF No load, middle/worst code (0x800) - - 0.3 Sample and hold mode, CSH = 100 nF - 330 × TON(3) /(TON + TOFF) 680 × TON /(TON + TOFF) (3) IDDV(DAC) DAC consumption from VREF+ DAC output buffer ON No load, middle code (0x800) - 170 240 No load, worst code (0x0E4) - 300 400 DAC output buffer OFF No load, middle/worst code (0x800) - 145 180 Sample and hold mode, buffer ON, CSH = 100 nF (worst code) - 170 × TON /(TON + TOFF) (3) 400 × TON /(TON + TOFF) (3) Sample and hold mode, buffer OFF, CSH = 100 nF (worst code) - 145 × TON /(TON + TOFF) (3) 180 × TON /(TON + TOFF) (3) 1. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value). 2. Refer to Table 86. I/O static characteristics. 3. TON is the refresh phase duration. TOFF is the hold phase duration (see the product reference manual for more details). Figure 41. 12-bit buffered/non-buffered DAC 12-bit digital-to-analog converter Buffered/non-buffered DAC DAC_OUTx RLOAD CLOAD Buffer(1) (1) The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. STM32U375xx Electrical characteristics DS14861 - Rev 2 page 153/222 |
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