R5F10WMDA datasheet(101/126 Pages) RENESAS

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RL78/L13

3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA =

−40 to +105°C)

R01DS0168EJ0210 Rev.2.10

Aug 12, 2016

Page 101 of 123

(6) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (2/2)

(TA =

−40 to +105°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter

Symbol

Conditions

HS (high-speed main) Mode

Unit

MIN.

MAX.

SIp setup time

(to SCKp

↓)Note 2

tSIK1

4.0 V

≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,

Cb = 20 pF, Rb = 1.4 k

2.7 V

≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,

Cb = 20 pF, Rb = 2.7 k

2.4 V

≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,

Cb = 30 pF, Rb = 5.5 k

220

SIp hold time

(from SCKp

↓)Note 2

tKSI1

4.0 V

≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,

Cb = 20 pF, Rb = 1.4 k

2.7 V

≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,

Cb = 20 pF, Rb = 2.7 k

2.4 V

≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,

Cb = 30 pF, Rb = 5.5 k

Delay time from SCKp

↑ to

SOp outputNote 2

tKSO1

4.0 V

≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,

Cb = 20 pF, Rb = 1.4 k

2.7 V

≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,

Cb = 20 pF, Rb = 2.7 k

2.4 V

≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,

Cb = 30 pF, Rb = 5.5 k

CSI mode connection diagram (during communication at different potential)

SCKp

SOp

SCK

User device

SIp

RL78

microcontroller

Notes 1.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.

When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

Caution

Select the TTL input buffer for the SIp pin and the N-ch open drain output (VDD tolerance) mode for the

SOp pin and SCKp pin by using port input mode register g (PIMg) and port output mode register g

(POMg). For VIH and VIL, see the DC characteristics with TTL input buffer selected.

Remarks 1.

Rb[

Ω]: Communication line (SCKp, SOp) pull-up resistance, Cb[F]: Communication line (SCKp, SOp) load

capacitance, Vb[V]: Communication line voltage

p: CSI number (p = 00, 10), m: Unit number, n: Channel number (mn = 00, 02),

g: PIM and POM number (g = 0, 1)

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn).

m: Unit number, n: Channel number (mn = 00))

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