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HC705E5GRS/D Datasheet(PDF) 14 Page - NXP Semiconductors |
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HC705E5GRS/D Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 148 page ![]() List of Figures General Release Specification MC68HC705E5 — Rev. 1.0 List of Figures Figure Title Page 9-1 PLL Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 9-2 Phase-Locked Loop Control Register (PLLCR) . . . . . . . . . .63 10-1 System Control and Status Register (SCSR) . . . . . . . . . . . .68 11-1 M-Bus Transmission Signal Diagram . . . . . . . . . . . . . . . . . .74 11-2 Clock Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 11-3 M-Bus Address Register (MADR) . . . . . . . . . . . . . . . . . . . .78 11-4 M-Bus Interface Block Diagram . . . . . . . . . . . . . . . . . . . . . .79 11-5 M-Bus Frequency Divider Register (MFDR). . . . . . . . . . . . .80 11-6 M-Bus Control Register (MCR) . . . . . . . . . . . . . . . . . . . . . .82 11-7 M-Bus Status Register (MSR) . . . . . . . . . . . . . . . . . . . . . . .84 11-8 M-Bus Data I/O Register (MDR). . . . . . . . . . . . . . . . . . . . . .86 11-9 Flowchart of M-Bus Interrupt Routine. . . . . . . . . . . . . . . . . .87 12-1 SSI Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 12-2 Synchronous Serial Interface Timing (CPOL = 1) . . . . . . . .99 12-3 Synchronous Serial Interface Timing (CPOL = 0) . . . . . . . .99 12-4 SSI Control Register (SCR) . . . . . . . . . . . . . . . . . . . . . . . .100 12-5 SSI Status Register (SSR) . . . . . . . . . . . . . . . . . . . . . . . . .103 12-6 SSI Data Register (SDR) . . . . . . . . . . . . . . . . . . . . . . . . . .104 13-1 Programmer Interface to Host . . . . . . . . . . . . . . . . . . . . . .109 13-2 MC68HC705E5 Bootloader Flowchart . . . . . . . . . . . . . . . .110 13-3 MC68HC705E5 Programming Circuit . . . . . . . . . . . . . . . .111 13-4 Programming Register (PROG) . . . . . . . . . . . . . . . . . . . . .112 13-5 Mask Option Register (MOR) . . . . . . . . . . . . . . . . . . . . . . .113 15-1 Maximum Supply Current versus Operating Frequency . .137 15-2 Typical Supply Current versus Operating Frequency. . . . .137 15-3 External Interrupt Mode Diagram . . . . . . . . . . . . . . . . . . . .138 15-4 Power-On Reset and RESET . . . . . . . . . . . . . . . . . . . . . . .139 15-5 M-Bus Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . .141 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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