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HC705E5GRS/D Datasheet(PDF) 73 Page - NXP Semiconductors |
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HC705E5GRS/D Datasheet(HTML) 73 Page - NXP Semiconductors |
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73 / 148 page ![]() Motorola Bus (M Bus) Interface M-Bus Interface Features MC68HC705E5 — Rev. 1.0 General Release Specification Motorola Bus (M Bus) Interface 11.3 M-Bus Interface Features Features of the M-bus interface include: • Fully Compatible with I2C Bus Standard • Multimaster Operation • Software Programmable for 1of 32 Different Serial Clock Frequencies • Software Selectable Acknowledge Bit • Interrupt Driven Byte-by-Byte Data Transfer • Arbitration Lost Driven Interrupt with Automatic Mode Switching from Master to Slave • Calling Address Identification Interrupt • Generate/Detect the Start or Stop Signal • Repeated Start Signal Generation • Generate/Recognize the Acknowledge Bit • Bus Busy Detection 11.4 M-Bus System Configuration The M-bus system uses a serial data line (SDA) and a serial clock line (SCL) for data transfer. All devices connected to it must have open-drain or open-collector outputs and the logical AND function is performed on both lines by two pullup resistors. 11.5 M-Bus Protocol Normally, a standard communication is composed of four parts: start signal, slave address transmission, data transfer, and stop signal. These are described briefly in the following subsections and illustrated in Figure 11-1. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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