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HC705E5GRS/D Datasheet(PDF) 18 Page - NXP Semiconductors |
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HC705E5GRS/D Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 148 page ![]() General Description General Release Specification MC68HC705E5 — Rev. 1.0 General Description 1.3 Features Features of the MC68HC705E5 include: • Low Cost • HC05 Core • 28-Pin Package • On-Chip Oscillator (Crystal or Ceramic Resonator) • Phase-Locked Loop (PLL) Synthesizer with Programmable Speed • Synchronous Serial Interface (SSI) with Interrupts and Most Significant Bit (MSB) or Least Significant Bit (LSB) First • M-Bus (I2C) Communication Port • 5120 Bytes of User EPROM (Including 16 Bytes of EPROM User Vectors) • 384 Bytes of On-Chip RAM • 15-Stage Multifunctional Timer with Programmable Input • Real-Time Interrupt Circuit • Computer Operating Properly (COP) Watchdog Timer Mask Option • Custom Periodic Interrupt Circuit • 20 Bidirectional I/O Lines • Single-Chip Mode • Bootloader Mode • Power-Saving Stop and Wait Modes • Edge-Only Sensitive or Edge- and Level-Sensitive Interrupt Trigger Mask Option • STOP Instruction Disable Mask Option • System Control and Status Register • Illegal Address Reset Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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