HC705E5GRSSLASHD datasheet(58/148 Pages) NXP

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Timer

General Release Specification

MC68HC705E5 — Rev. 1.0

Timer

RTIE — Real-Time Interrupt Enable

When this bit is set, a CPU interrupt request is generated when the

RTIF bit is set. Reset clears this bit.

TOFA — Timer Over Flow Flag Acknowledge

When a one is written to this bit location, the TOF flag bit is cleared.

This bit always reads as a zero.

RTIFA — Real-Time Interrupt Flag Acknowledge

When a one is written to this bit location, the RTIF flag bit is cleared.

This bit always reads as a zero.

RT1–RT0 — Real-Time Interrupt Rate Select

These two bits select one of four taps from the real-time interrupt

circuit.Table 8-1 shows the available interrupt rates with several fop

values. Reset sets RT0 and RT1, selecting the lowest periodic rate

and therefore the maximum time in which to alter these bits if

necessary. Care should be taken when altering RT0 and RT1 if the

time-out period is imminent or uncertain. If the selected tap is

modified during a cycle in which the counter is switching, an RTIF

could be missed or an additional one could be generated.

Table 8-1. RTI Rates

RT1–RT0

RT1 Rates at fop Frequency Specified

16.384 kHz

524 kHz

1.049 MHz

2.097 MHz

4.194 MHz

fop

1 s

31.3 ms

15.6 ms

7.8 ms

3.9 ms

214

÷ f

2 s

62.5 ms

31.3 ms

15.6 ms

7.8 ms

215

÷ f

4 s

125 ms

62.5 ms

31.3 ms

15.6 ms

216

÷ f

8 s

250 ms

125.1 ms

62.5 ms

31.3 ms

217

÷ f

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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