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STM32U375CE Datasheet(PDF) 163 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 163 Page - STMicroelectronics |
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163 / 222 page  Table 108. TIMx characteristics Symbol Parameter Conditions Min Max Unit(1) tres(TIM) Timer resolution time - 1 - tTIMxCLK fTIMxCLK = 96 MHz 10.4 - ns fEXT Timer external clock frequency on CH1 to CH4 - 0 fTIMxCLK/2 MHz fTIMxCLK = 96 MHz 0 48 ResTIM Timer resolution TIMx (except TIM2/TIM3/TIM4) - 16 bit TIM2/TIM3/TIM4 - 32 tCOUNTER 16-bit counter clock period - 1 65536 tTIMxCLK fTIMxCLK = 96 MHz 0.010 682.7 µs tMAX_COUNT Maximum possible count with 32 ‑bit counter - - 65536 × 65536 tTIMxCLK fTIMxCLK = 96 MHz - 44.739 s 1. TIMx, is used as a general term in which x stands for 1, 2, 3, 4, 6, 7, 15, 16, 17. Table 109. IWDG min/max timeout period at 32 kHz (LSI) Note: For the values in this table, the exact timings still depend on the phasing of the APB interface clock versus the LSI clock, so that there is always a full RC period of uncertainty. Prescaler divider PR[2:0] bits Min timeout RL[11:0] = 0x000 Max timeout RL[11:0] = 0xFFF Unit /4 0 0.125 512 ms /8 1 0.250 1024 /16 2 0.500 2048 /32 3 1.0 4096 /64 4 2.0 8192 /128 5 4.0 16384 /256 6 or 7 8.0 32768 Table 110. WWDG min/max timeout value at 96 MHz (PCLK) Prescaler WDGTB Min timeout values Max timeout value Unit 1 0 0.0427 2.731 ms 2 1 0.0853 5.461 4 2 0.1707 10.923 8 3 0.3413 21.845 16 4 0.6827 43.691 32 5 1.3653 87.381 64 6 2.7307 174.763 128 7 5.4613 349.525 5.3.28 OCTOSPI characteristics Unless otherwise specified, the parameters given in Table 111, Table 112, and Table 113 are derived from tests performed under the ambient temperature, fAHB frequency and VDD supply voltage conditions summarized in Table 27, with the following configuration: • Output speed set to OSPEEDRy[1:0] = 10 • Delay block enabled for DTR (with DQS)/HyperBus STM32U375xx Electrical characteristics DS14861 - Rev 2 page 163/222 |
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