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STM32U375CE Datasheet(PDF) 165 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 165 Page - STMicroelectronics |
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165 / 222 page ![]() Symbol Parameter Conditions Min Typ Max Unit tww(CLKH) OCTOSPI clock high and low time (odd division) PRESCALER[7:0] = n (n = 2, 4, 6,..254) (n/2) × t(CLK)/ (n+1) - 0.5 ns - (n/2) × t(CLK)/ (n+1) + 0.5 tw(CLKL) ((n/2)+1) × t(CLK)/(n+1) - 0.5 - ((n/2)+1) × t(CLK)/(n+1) + 0.5 tsr(IN) tsf(IN) Data input setup time Voltage range 1 3 - - Voltage range 2 5 - - thr(IN) thf(IN) Data input hold time Voltage range 1 3.5 - - Voltage range 2 4 - - tvr(OUT) tvf(OUT) Data output valid time, DHQC = 0 Voltage range 1 - 8.5 13 Voltage range 2 - 12.5 21.5 Data output valid time, DHQC = 1 Voltage range 1 All prescaler values (except 0) - t(CLK)/4 + 1.5 t(CLK)/4 + 3.5 thr(OUT) thf(OUT) Data output hold time, DHQC = 0 Voltage range 1 5.5 - - Voltage range 2 10 - - Data output hold time, DHQC = 1 Voltage range 1 All prescaler values (except 0) t(CLK)/4 - 1 - - 1. Activating DHQC is mandatory to reach this frequency. Table 113. OCTOSPI characteristics in DTR mode (with DQS)/HyperBus Delay block bypassed. Evaluated by characterization. Not tested in production. Symbol Parameter Conditions Min Typ Max Unit f(CLK) OCTOSPI clock frequency 1.71 V < VDDIOX < 3.6 V Voltage range 1 CL = 15 pF - - 48(1)(2) MHz 1.7 V < VDDIOX < 3.6 V Voltage range 2 CL = 15 pF - - 24(1)(2) 1.08 V ≤ VDDIO2 ≤ 1.32 V CL = 15 pF - - 15(1)(2) tw(CLKH) OCTOSPI clock high and low time (even division) PRESCALER[7:0] = n (n = 0, 1, 3, 5,..255) t(CLK)/2 - 0.5 - t(CLK)/2 + 0.5 ns tw(CLKL) tw(CLKH) OCTOSPI clock high and low time (odd division) PRESCALER[7:0] = n (n = 2, 4, 6,..254) (n/2) × t(CLK)/ (n+1) - 0.5 - (n/2) × t(CLK)/ (n+1) + 0.5 tww(CLKL) ((n/2)+1) × t(CLK)/(n+1) - 0.5 - ((n/2)+1) × t(CLK)/(n+1) + 0.5 tv(CLKL) Clock valid time - - - t(CLK) + 2 thv(CLK) Clock hold time - t(CLK)/2 - 1 - - VODr(CLK)(3) CLK, NCLK crossing level on CLK rising edge VDDIOX = 1.8 V 1230 - 1450 mV VODf(CLK)(3) CLK, NCLK crossing level on CLK falling edge VDDIOX = 1.8 V 819 - 900 tw(CS) Chip select high time - 3 × t(CLK) - - ns tv(DQ) Data input valid time - 0 - - tv(DS) Data strobe input valid time - 0 - - STM32U375xx Electrical characteristics DS14861 - Rev 2 page 165/222 |
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