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MSP430F6638IPZ Datasheet(PDF) 46 Page - Texas Instruments

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Part # MSP430F6638IPZ
Description  MSP430F663x Mixed-Signal Microcontrollers
PDF  133 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F6638IPZ Datasheet(HTML) 46 Page - Texas Instruments

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8.39 12-Bit ADC, Linearity Parameters Using an External Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
EI
Integral linearity error(2)
1.4 V ≤ dVREF ≤ 1.6 V(1)
2.2 V, 3 V
±2
LSB
1.6 V < dVREF (1)
±1.7
ED
Differential linearity error(2)
See (1)
2.2 V, 3 V
±1
LSB
EO
Offset error(3)
dVREF ≤ 2.2 V(1)
2.2 V, 3 V
±3
±5.6
LSB
dVREF > 2.2 V(1)
2.2 V, 3 V
±1.5
±3.5
EG
Gain error(3)
See (1)
2.2 V, 3 V
±1
±2.5
LSB
ET
Total unadjusted error
dVREF ≤ 2.2 V(1)
2.2 V, 3 V
±3.5
±7.1
LSB
dVREF > 2.2 V(1)
2.2 V, 3 V
±2
±5
(1)
The external reference voltage is selected by: SREF2 = 0 or 1, SREF1 = 1, SREF0 = 0. dVREF = VR+ - VR-. VR+ < AVCC. VR- > AVSS.
Unless otherwise mentioned, dVREF > 1.5 V. Impedance of the external reference voltage R < 100 Ω, and two decoupling capacitors,
10 µF and 100 nF, should be connected to VREF+/VREF- to decouple the dynamic current. See also the MSP430F5xx and
MSP430F6xx Family User's Guide.
(2)
Parameters are derived using the histogram method.
(3)
Parameters are derived using a best fit curve.
8.40 12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
EI
Integral linearity error(2)
See (1)
2.2 V, 3 V
±1.7
LSB
ED
Differential linearity error(2)
See (1)
2.2 V, 3 V
±1
LSB
EO
Offset error(3)
See (1)
2.2 V, 3 V
±1
±2
LSB
EG
Gain error(3)
See (1)
2.2 V, 3 V
±2
±4
LSB
ET
Total unadjusted error
See (1)
2.2 V, 3 V
±2
±5
LSB
(1)
AVCC as reference voltage is selected by: SREF2 = 0, SREF1 = 0, SREF0 = 0.
(2)
Parameters are derived using the histogram method.
(3)
Parameters are derived using a best fit curve.
8.41 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS(1)
VCC
MIN
TYP
MAX
UNIT
EI
Integral linearity error(2)
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 4.0 MHz
2.2 V, 3 V
±1.7
LSB
ADC12SR = 0, REFOUT = 0
fADC12CLK ≤ 2.7 MHz
±2.5
ED
Differential
linearity error(2)
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 4.0 MHz
2.2 V, 3 V
–1
+1.5
LSB
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 2.7 MHz
±1
ADC12SR = 0, REFOUT = 0
fADC12CLK ≤ 2.7 MHz
–1
+2.5
EO
Offset error(3)
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 4.0 MHz
2.2 V, 3 V
±2
±4
LSB
ADC12SR = 0, REFOUT = 0
fADC12CLK ≤ 2.7 MHz
±2
±4
EG
Gain error(3)
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 4.0 MHz
2.2 V, 3 V
±1
±2.5
LSB
ADC12SR = 0, REFOUT = 0
fADC12CLK ≤ 2.7 MHz
±1%(4)
VREF
ET
Total unadjusted error
ADC12SR = 0, REFOUT = 1
fADC12CLK ≤ 4.0 MHz
2.2 V, 3 V
±2
±5
LSB
ADC12SR = 0, REFOUT = 0
fADC12CLK ≤ 2.7 MHz
±1%(4)
VREF
(1)
The external reference voltage is selected by: SREF2 = 0, SREF1 = 0, SREF0 = 1. dVREF = VR+ - VR-.
(2)
Parameters are derived using the histogram method.
(3)
Parameters are derived using a best fit curve.
(4)
The gain error and the total unadjusted error are dominated by the accuracy of the integrated reference module absolute accuracy. In
this mode the reference voltage used by the ADC12_A is not available on a pin.
MSP430F6638, MSP430F6637, MSP430F6636, MSP430F6635, MSP430F6634
MSP430F6633, MSP430F6632, MSP430F6631, MSP430F6630
SLAS566G – JUNE 2010 – REVISED SEPTEMBER 2020
www.ti.com
46
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: MSP430F6638 MSP430F6637 MSP430F6636 MSP430F6635 MSP430F6634
MSP430F6633 MSP430F6632 MSP430F6631 MSP430F6630



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