 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MSP430F6638IPZ Datasheet(PDF) 14 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
MSP430F6638IPZ Datasheet(HTML) 14 Page - Texas Instruments |
|
|
14 / 133 page  Table 7-1. Signal Descriptions (continued) TERMINAL I/O(1) DESCRIPTION NAME NO.(4) PZ ZCA, ZQW AVCC1 11 E1, E2 Analog power supply AVSS1 12 F2 Analog ground supply XIN 13 F1 I Input terminal for crystal oscillator XT1 XOUT 14 G1 O Output terminal of crystal oscillator XT1 AVSS2 15 G2 Analog ground supply P5.6/ADC12CLK/DMAE0 16 H1 I/O General-purpose digital I/O Conversion clock output ADC (not available on F6632, F6631, and F6630 devices) DMA external trigger input P2.0/P2MAP0 17 G4 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_B0 SPI slave transmit enable; USCI_A0 clock input/output P2.1/P2MAP1 18 H2 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_B0 SPI slave in/master out; USCI_B0 I2C data P2.2/P2MAP2 19 J1 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_B0 SPI slave out/master in; USCI_B0 I2C clock P2.3/P2MAP3 20 H4 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_B0 clock input/output; USCI_A0 SPI slave transmit enable P2.4/P2MAP4 21 J2 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_A0 UART transmit data; USCI_A0 SPI slave in/master out P2.5/P2MAP5 22 K1 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: USCI_A0 UART receive data; USCI_A0 slave out/master in P2.6/P2MAP6/R03 23 K2 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: no secondary function Input/output port of lowest analog LCD voltage (V5) P2.7/P2MAP7/LCDREF/R13 24 L2 I/O General-purpose digital I/O with port interrupt and mappable secondary function Default mapping: no secondary function External reference voltage input for regulated LCD voltage Input/output port of third most positive analog LCD voltage (V3 or V4) DVCC1 25 L1 Digital power supply DVSS1 26 M1 Digital ground supply VCORE(2) 27 M2 Regulated core power supply (internal use only, no external current loading) P5.2/R23 28 L3 I/O General-purpose digital I/O Input/output port of second most positive analog LCD voltage (V2) LCDCAP/R33 29 M3 I/O LCD capacitor connection Input/output port of most positive analog LCD voltage (V1) CAUTION CAUTION: LCDCAP/R33 must be connected to DVSS if not used. COM0 30 J4 O LCD common output COM0 for LCD backplane MSP430F6638, MSP430F6637, MSP430F6636, MSP430F6635, MSP430F6634 MSP430F6633, MSP430F6632, MSP430F6631, MSP430F6630 SLAS566G – JUNE 2010 – REVISED SEPTEMBER 2020 www.ti.com 14 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: MSP430F6638 MSP430F6637 MSP430F6636 MSP430F6635 MSP430F6634 MSP430F6633 MSP430F6632 MSP430F6631 MSP430F6630 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
