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HC705E5GRS/D Datasheet(PDF) 108 Page - NXP Semiconductors

Part # HC705E5GRS/D
Description  General Release Specification
PDF  148 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705E5GRS/D Datasheet(HTML) 108 Page - NXP Semiconductors

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User EPROM
General Release Specification
MC68HC705E5 — Rev. 1.0
User EPROM
Three pins are used to select various bootloader functions: PB0, PB3,
and PB4. PB0 is normally a SYNC pin, which is used to synchronize the
MCU to an off-chip source driving EPROM data into the MCU. If an
external EPROM is used, this pin must be connected to V
SS
. PB4 and
PB3 are used to select a programming mode. Two other pins, PC2 and
PC3, are used to drive the PROG LED and the VERF LED, respectively.
The programming modes along with gate and drain stress are shown in
Table 13-1.
The bootloader uses an external 12-bit counter to address the memory
device containing the code to be copied. This counter requires a clock
and a reset function. The 12-bit counter can address up to 4 Kbytes of
memory, which means that a port pin has to be used to address the extra
memory space.
Table 13-1. Bootloader Functions
PB0
PB4
PB3
Mode
SYNC
1
1
Program/Verify
SYNC
1
0
Verify Only
SYNC
0
0
Factory Test
0
0
1
Factory Test
1
0
1
Factory Test
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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