STM32U375CE datasheet(177/222 Pages) STMICROELECTRONICS

177 / 222 page

Symbol

Parameter

Conditions

Min

Max

Unit

tv(FS)

FS valid time

Master mode, 2.7 V ≤ VDDIOX ≤ 3.6 V

Master mode 1.71 V ≤ VDDIOX ≤ 3.6 V

16/23(3)

th(FS)

FS hold time

Master mode

tsu(FS)

FS setup time

Slave mode

1.5

th(FS)

FS hold time

Slave mode

tsu(SD_A_MR)

Data input setup time

Master receiver

2.5

tsu(SD_B_SR)

Slave receiver

th(SD_A_MR)

Data input hold time

Master receiver

1.5

th(SD_B_SR)

Slave receiver

tv(SD_B_ST)

Data output valid time

Slave transmitter (after enable edge), 2.7 V ≤ VDDIOX ≤ 3.6 V

16.5

Slave transmitter (after enable edge), 1.71 V ≤ VDDIOX ≤ 3.6 V

16.5/24(2)

th(SD_B_ST)

Data output hold time

Slave transmitter (after enable edge)

7.5

tv(SD_A_MT)

Data output valid time

Master transmitter (after enable edge), 2.7 V ≤ VDDIOX ≤ 3.6 V

17.5

Master transmitter (after enable edge), 1.71 V ≤ VDDIOX ≤ 3.6 V

17.5/25.5(2)

th(SD_A_MT)

Data output hold time

Master transmitter (after enable edge)

1. APB clock frequency that must be at least twice SAI clock frequency.

2. When using PE6/PA10/PA13/PE7

3. When using PE4/PA9/PA14

Figure 63. SAI master timing diagram

SAI_SCK_X

(CKSTR = 1)

SAI_FS_X

(output)

1/fSCK

SAI_SD_X

(transmit)

tv(FS)

Slot n

SAI_SD_X

(receive)

th(FS)

Slot n+2

tv(SD_MT)

Slot n

tsu(SD_MR)

th(SD_MR)

SAI_SCK_X

(CKSTR = 0)

th(SD_MT)

STM32U375xx

Electrical characteristics

DS14861 - Rev 2

page 177/222

STM32U375CE Datasheet(PDF) 177 Page - STMicroelectronics

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