R5F72115D160FPV datasheet(42/1228 Pages) RENESAS

42 / 1228 page

Section 2 CPU

Rev. 2.00 May. 08, 2008 Page 18 of 1200

REJ09B0344-0200

2.1.3

System Registers

The system registers consist of four 32-bit registers: the high and low multiply and accumulate

registers (MACH and MACL), the procedure register (PR), and the program counter (PC). MACH

and MACL store the results of multiply or multiply and accumulate operations. PR stores the

return address from a subroutine procedure. PC indicates the program address being executed and

controls the flow of the processing.

MACL

MACH

Multiply and accumulate register high (MACH) and multiply

and accumulate register low (MACL):

Store the results of multiply or multiply and accumulate operations.

Procedure register (PR):

Stores the return address from a subroutine procedure.

Program counter (PC):

Indicates the four bytes ahead of the current instruction.

Figure 2.3 System Registers

(1)

Multiply and Accumulate Register High (MACH) and Multiply and Accumulate

MACH and MACL are used as the addition value in a MAC instruction, and store the result of a

MAC or MUL instruction.

(2)

Procedure Register (PR)

PR stores the return address of a subroutine call using a BSR, BSRF, or JSR instruction, and is

referenced by a subroutine return instruction (RTS).

(3)

Program Counter (PC)

PC indicates the address of the instruction being executed.

R5F72115D160FPV Datasheet(PDF) 42 Page - Renesas Technology Corp