R5F72115D160FPV datasheet(78/1228 Pages) RENESAS

78 / 1228 page

Section 2 CPU

Rev. 2.00 May. 08, 2008 Page 54 of 1200

REJ09B0344-0200

(1)

Reset State

In the reset state, the CPU is reset. There are two kinds of reset, power-on reset and manual reset.

(2)

Exception Handling State

The exception handling state is a transient state that occurs when exception handling sources such

as resets or interrupts alter the CPU’s processing state flow.

For a reset, the initial values of the program counter (PC) (execution start address) and stack

pointer (SP) are fetched from the exception handling vector table and stored; the CPU then

branches to the execution start address and execution of the program begins.

For an interrupt, the stack pointer (SP) is accessed and the program counter (PC) and status

from the exception handling vector table; the CPU then branches to that address and the program

starts executing, thereby entering the program execution state.

(3)

Program Execution State

In the program execution state, the CPU sequentially executes the program.

(4)

Power-Down State

In the power-down state, the CPU stops operating to reduce power consumption. The SLEEP

instruction places the CPU in the sleep mode or the software standby mode.

(5)

Bus-Released State

In the bus-released state, the CPU releases bus to a device that has requested it.

R5F72115D160FPV Datasheet(PDF) 78 Page - Renesas Technology Corp