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R5F72115D160FPV Datasheet(PDF) 8 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 8 Page - Renesas Technology Corp

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Rev. 2.00 May. 08, 2008 Page viii of xxiv
REJ09B0344-0200
• Notation in bit figures and tables describing arrangements of bits
Each register description includes a figure that illustrates the arrangement of bits and a table
that describes the meanings of settings in the bits.
Indicates the bit number.
In the case of a 32-bit register, the bits are arranged in order from 31 to 0, and in the case
of a 16-bit register, the bits are arranged in the order from 15 to 0.
The short form of the name of the bit or bit field within the register.
When the individual bits of bit fields have to be clearly indicated, notation allowing this is
included (e.g., ASID[3:0]).
A reserved bit is indicated by
−.
Instead of a bit name, a blank is used for some bits, such as those of timer counters.
(1) Bit
(2) Bit Name
(1)
(2)
Indicates the value of each bit after a power-on reset, i.e., the initial value.
0: Initial value is 0
1: Initial value is 1
−: Initial value is undefined
(3) Initial Value
(3)
Indicates whether each bit is readable or writable, or either writing to or reading from the bit is
prohibited.
The notation is as follows:
R/W:
R/(W):
R:
W:
Bit or field is readable and writable.
Bit or field is readable and writable.
However, writing is only performed to clear the flag.
Bit or field is readable and writable.
However, "R" is indicated for all reserved bits. When writing to the bit is required, write
the value stated in the bit table or the initial value.
Bit or field is readable and writable.
However, only the value in the bit table is guaranteed when reading from the bit.
Note: The bit names and sentences in the above figure are examples, and have nothing to do with the contents of this
manual.
(4) R/W
(4)
Describes the function enabled by setting the bit.
(5) Description
(5)
15
14
13
12
11
10
9876543210
Bit:
Bit
15
14 to 11
10
9
0
0000
0
0
1
R
R/W
R
R
Reserved
This bit is always read as 0. The write value should always be 0.
Address Identifier
Enables or disables the pin function.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
−
ASID
−
−
−
Bit Name
Initial Value R/W
Description
Initial value:
R/W:
0000001000000000
R
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
ASID
-
-
-
-
-
-
ACMP[2:0]
Q
IFE
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