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R5F72115D160FPV Datasheet(PDF) 29 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 29 Page - Renesas Technology Corp |
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29 / 1228 page ![]() Section 1 Overview Rev. 2.00 May. 08, 2008 Page 5 of 1200 REJ09B0344-0200 Items Specification Multi-function timer pulse unit 2 (MTU2) • Maximum 16 lines of pulse input/output and 3 lines of pulse input based on six channels of 16-bit timers • 21 output compare and input capture registers • Input capture function • Pulse output modes Toggle, PWM, complementary PWM, and reset-synchronized PWM modes • Synchronization of multiple counters • Complementary PWM output mode ⎯ Non-overlapping waveforms output for 3-phase inverter control ⎯ Automatic dead time setting ⎯ 0% to 100% PWM duty value specifiable ⎯ A/D conversion delaying function ⎯ Interrupt skipping at crest or trough • Reset-synchronized PWM mode Three-phase PWM waveforms in positive and negative phases can be output with a required duty value • Phase counting mode Two-phase encoder pulse counting available Multi-function timer pulse unit 2S (MTU2S) • Subset of MTU2, included in channels 3 to 5 • Operating at 80 MHz max. Port output enable 2 (POE2) • High-impedance control of high-current pins at a falling edge or low- level input on the POE pin Compare match timer (CMT) • Two-channel 16-bit counters • Four types of clock can be selected (Pφ/8, Pφ/32, Pφ/128, and Pφ/512) • DMA transfer request or interrupt request can be issued when a compare match occurs Serial communication interface with FIFO (SCIF) • Four channels • Clocked synchronous or asynchronous mode selectable • Simultaneous transmission and reception (full-duplex communication) supported • Dedicated baud rate generator • Separate 16-byte FIFO registers for transmission and reception |
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