R5F72115D160FPV datasheet(14/1228 Pages) RENESAS

14 / 1228 page

Rev. 2.00 May. 08, 2008 Page xiv of xxiv

REJ09B0344-0200

9.4.1

Transfer Flow........................................................................................................ 327

9.4.2

DMA Transfer Requests ....................................................................................... 329

9.4.3

Channel Priority.................................................................................................... 333

9.4.4

DMA Transfer Types............................................................................................ 336

9.4.5

Number of Bus Cycles and DREQ Pin Sampling Timing .................................... 345

9.5

Usage Note......................................................................................................................... 349

9.5.1

Half-End Flag Setting and Half-End Interrupt...................................................... 349

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)..................................... 351

10.1

Features.............................................................................................................................. 351

10.2

Input/Output Pins ............................................................................................................... 357

10.3

Register Descriptions ......................................................................................................... 358

10.3.1 Timer Control Register (TCR).............................................................................. 362

10.3.2 Timer Mode Register (TMDR)............................................................................. 366

10.3.3 Timer I/O Control Register (TIOR) ...................................................................... 369

10.3.4 Timer Compare Match Clear Register (TCNTCMPCLR) .................................... 388

10.3.5 Timer Interrupt Enable Register (TIER)............................................................... 389

10.3.6 Timer Status Register (TSR)................................................................................. 394

10.3.7 Timer Buffer Operation Transfer Mode Register (TBTM)................................... 401

10.3.8 Timer Input Capture Control Register (TICCR) ................................................... 403

10.3.9 Timer Synchronous Clear Register (TSYCR)....................................................... 404

10.3.10 Timer A/D Converter Start Request Control Register (TADCR) ......................... 406

10.3.11 Timer A/D Converter Start Request Cycle Set Registers

(TADCORA_4 and TADCORB_4)...................................................................... 409

10.3.12 Timer A/D Converter Start Request Cycle Set Buffer Registers

(TADCOBRA_4 and TADCOBRB_4) ................................................................ 409

10.3.13 Timer Counter (TCNT)......................................................................................... 410

10.3.14 Timer General Register (TGR) ............................................................................. 410

10.3.15 Timer Start Register (TSTR) ................................................................................ 411

10.3.16 Timer Synchronous Register (TSYR)................................................................... 413

10.3.17 Timer Counter Synchronous Start Register (TCSYSTR) ..................................... 415

10.3.18 Timer Read/Write Enable Register (TRWER) ..................................................... 418

10.3.19 Timer Output Master Enable Register (TOER) .................................................... 419

10.3.20 Timer Output Control Register 1 (TOCR1) .......................................................... 420

10.3.21 Timer Output Control Register 2 (TOCR2) .......................................................... 423

10.3.22 Timer Output Level Buffer Register (TOLBR) .................................................... 426

10.3.23 Timer Gate Control Register (TGCR) .................................................................. 427

10.3.24 Timer Subcounter (TCNTS) ................................................................................. 429

10.3.25 Timer Dead Time Data Register (TDDR)............................................................. 430

10.3.26 Timer Cycle Data Register (TCDR) ..................................................................... 430

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