R5F72115D160FPV datasheet(82/1228 Pages) RENESAS

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Section 3 MCU Operating Modes

Rev. 2.00 May. 08, 2008 Page 58 of 1200

REJ09B0344-0200

3.4

Address Map

The address map for the operating modes is shown in figure 3.1.

Modes 0 and 1

On-chip ROM disabled mode

Mode 2

On-chip ROM enabled mode

Mode 3

Single chip mode

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

SDRAM mode setting space

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

SDRAM mode setting space

CS0 space

CS1 space

CS2 space

CS3 space

CS4 space

CS5 space

CS6 space

CS7 space

CS0 space

CS1 space

CS2 space

CS3 space

CS4 space

CS5 space

CS6 space

CS7 space

On-chip ROM (512 Kbytes)

H'00000000

H'02000000

H'01FFFFFF

H'03FFFFFF

H'0007FFFF

H'07FFFFFF

H'04000000

H'00080000

H'08000000

H'0BFFFFFF

H'0C000000

H'0FFFFFFF

H'10000000

H'13FFFFFF

H'14000000

H'17FFFFFF

H'18000000

H'1BFFFFFF

H'1C000000

H1FFFFFFF

Reserved area

H'FFF7FFFF

H'FFF80000

H'FFF87FFF

H'FFF88000

H'FFF7FFFF

H'FFF80000

H'FFF87FFF

H'FFF88000

H'FFFBFFFF

Reserved area

H'FFFC0000

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

H'00000000

H'0007FFFF

H'00080000

Reserved area

H'FFF7FFFF

H'FFF80000

H'FFF87FFF

H'FFF88000

H'FFFBFFFF

Reserved area

H'FFFC0000

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

H'00000000

H'03FFFFFF

H'07FFFFFF

H'04000000

H'08000000

H'0BFFFFFF

H'0C000000

H'0FFFFFFF

H'10000000

H'13FFFFFF

H'14000000

H'17FFFFFF

H'18000000

H'1BFFFFFF

H'1C000000

H1FFFFFFF

H'20000000

Reserved area

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

Reserved area

H'FFFCFFFF

H'FFFD0000

H'FFFCFFFF

H'FFFD0000

Reserved area

Figure 3.1 Address Map for Each Operating Mode

R5F72115D160FPV Datasheet(PDF) 82 Page - Renesas Technology Corp

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