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R5F72115D160FPV Datasheet(PDF) 483 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 483 Page - Renesas Technology Corp

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 May. 08, 2008 Page 459 of 1200
REJ09B0344-0200
(1)
Example of PWM Mode Setting Procedure
Figure 10.25 shows an example of the PWM mode setting procedure.
PWM mode
Select counter clock
Select counter clearing
source
Select waveform
output level
Set TGR
Set PWM mode
Start count
<PWM mode>
[1]
[2]
[3]
[4]
[5]
[6]
[1] Select the counter clock with bits TPSC2 to
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and
CKEG0 in TCR.
[2] Use bits CCLR2 to CCLR0 in TCR to select
the TGR to be used as the TCNT clearing
source.
[3] Use TIOR to designate the TGR as an output
compare register, and select the initial value
and output value.
[4] Set the cycle in the TGR selected in [2], and
set the duty in the other TGR.
[5] Select the PWM mode with bits MD3 to MD0
in TMDR.
[6] Set the CST bit in TSTR to 1 to start the
count operation.
Figure 10.25 Example of PWM Mode Setting Procedure
(2)
Examples of PWM Mode Operation
Figure 10.26 shows an example of PWM mode 1 operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the period, and the values set in the TGRB registers
are used as the duty levels.



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