EP4CE40 datasheet(232/488 Pages) ALTERA

232 / 488 page

8–68

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices

Configuration

Cyclone IV Device Handbook,

May 2013

Altera Corporation

Volume 1

Table 8–21 lists the optional configuration pins. If you do not enable these optional

configuration pins in the Quartus II software, they are available as general-purpose

user I/O pins. Therefore, during configuration, these pins function as user I/O pins

and are tri-stated with weak pull-up resistors.

Table 8–21. Optional Configuration Pins

Pin Name

User Mode

Pin Type

Description

CLKUSR

N/A if option is on.

I/O if option is off.

Input

Optional user-supplied clock input synchronizes the

initialization of one or more devices. This pin is enabled by

turning on the Enable user-supplied start-up clock (CLKUSR)

option in the Quartus II software.

In AS configuration for Cyclone IV GX devices, you can use this

pin as an external clock source to generate the DCLK by

changing the clock source option in the Quartus II software in

the Configuration tab of the Device and Pin Options dialog

box.

INIT_DONE

N/A if option is on.

I/O if option is off.

Output

open-drain

Status pin is used to indicate when the device has initialized and

is in user-mode. When nCONFIG is low, the INIT_DONE pin is

tri-stated and pulled high due to an external 10-k

Ω pull-up

resistor during the beginning of configuration. After the option

bit to enable INIT_DONE is programmed into the device (during

the first frame of configuration data), the INIT_DONE pin goes

low. When initialization is complete, the INIT_DONE pin is

released and pulled high and the device enters user mode.

Thus, the monitoring circuitry must be able to detect a low-to-

high transition. This pin is enabled by turning on the Enable

INIT_DONE output option in the Quartus II software.

The functionality of this pin changes if the Enable OCT_DONE

option is enabled in the Quartus II software. This option

controls whether the INIT_DONE signal is gated by the

OCT_DONE

signal, which indicates the power-up on-chip

termination (OCT) calibration is complete. If this option is

turned off, the INIT_DONE signal is not gated by the OCT_DONE

signal.

DEV_OE

N/A if option is on.

I/O if option is off.

Input

Optional pin that allows you to override all tri-states on the

device. When this pin is driven low, all I/O pins are tri-stated;

when this pin is driven high, all I/O pins behave as

programmed. This pin is enabled by turning on the Enable

device-wide output enable (DEV_OE) option in the Quartus II

software.

DEV_CLRn

N/A if option is on.

I/O if option is off.

Input

Optional pin that allows you to override all clears on all device

registers. When this pin is driven low, all registers are cleared;

when this pin is driven high, all registers behave as

programmed. You can enable this pin by turning on the Enable

device-wide reset (DEV_CLRn) option in the Quartus II

software.

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