EP4CE40 datasheet(239/488 Pages) ALTERA

239 / 488 page

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices

8–75

Remote System Upgrade

May 2013

Altera Corporation

Cyclone IV Device Handbook,

Volume 1

Remote System Upgrade Registers

The remote system upgrade block contains a series of registers that stores the

configuration addresses, watchdog timer settings, and status information. Table 8–22

lists these registers.

The control and status registers of the remote system upgrade are clocked by the

10-MHz internal oscillator (the same oscillator that controls the user watchdog timer)

or the CLKUSR. However, the shift and update registers of the remote system upgrade

are clocked by the maximum frequency of 40-MHz user clock input (RU_CLK). There is

no minimum frequency for RU_CLK.

Remote System Upgrade Control Register

The remote system upgrade control register stores the application configuration

address, the user watchdog timer settings, and option bits for a application

configuration. In remote update mode for the AS configuration scheme, the control

configuration. In remote update mode for the AP configuration scheme, the control

load the AP default factory configuration. However, for the AP configuration scheme,

you can change the default factory configuration address to any desired address using

the APFC_BOOT_ADDR JTAG instruction. Additionally, a factory configuration in remote

update mode has write access to this register.

Table 8–22. Remote System Upgrade Registers

Description

Shift

This register is accessible by the logic array and allows the update, status, and control registers to be written

and sampled by user logic. Write access is enabled in remote update mode for factory configurations to allow

writing to the update register. Write access is disabled for all application configurations in remote update

mode.

Control

This register contains the current configuration address, the user watchdog timer settings, one option bit for

checking early CONF_DONE, and one option bit for selecting the internal oscillator as the startup state machine

clock. During a read operation in an application configuration, this register is read into the shift register. When

a reconfiguration cycle is started, the contents of the update register are written into the control register.

Update

This register contains data similar to that in the control register. However, it can only be updated by the factory

configuration by shifting data into the shift register and issuing an update operation. When a reconfiguration

cycle is triggered by the factory configuration, the control register is updated with the contents of the update

Status

This register is written by the remote system upgrade circuitry on every reconfiguration to record the cause of

the reconfiguration. This information is used by the factory configuration to determine the appropriate action

following a reconfiguration. During a capture cycle, this register is read into the shift register.

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