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UM0434 Datasheet(PDF) 64 Page - STMicroelectronics |
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UM0434 Datasheet(HTML) 64 Page - STMicroelectronics |
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64 / 390 page ![]() UM0434 Register model 65/391 The TCR fields are described in Table 41. Table 40. Timer control register (TCR) 323334 35 36 37 3839 40 41 4243 46 47 50 51 63 Field WP WRC WIE DIE FP FIE ARE — WPEXT FPEXT — Reset All zeros R/W R/W SPR SPR 340 Table 41. TCR field descriptions Bits Name Description 32–33 WP Watchdog timer period, When concatenated with WPEXT, specifies one of 64 bit locations of the time base used to signal a watchdog timer exception on a transition from 0 to 1. TCR[WPEXT]||TCR[WP] == 000000 selects TBU[32] (msb of TBU). TCR[WPEXT]||TCR[WP] == 111111 selects TBL[63] (lsb of TBL). 34–35 WRC Watchdog timer reset control. Software can set WRC but cannot clear it except by a software- induced reset. After WRC is written to a non-zero value, software can no longer alter it. 00 No watchdog timer reset can occur. 01 Force processor checkstop on second time-out of the watchdog timer. 10 Assert processor reset output ( p_resetout_b) on second time-out of watchdog timer. 11 Reserved. 36 WIE Watchdog timer interrupt enable. 0 Watchdog timer interrupts disabled. 1 Watchdog timer interrupts enabled. 37 DIE Decrementer interrupt enable. 0 Decrementer interrupts disabled. 1 Decrementer interrupts enabled. 38–39 FP Fixed-interval timer period. When concatenated with FPEXT, specifies one of 64 bit locations of the time base to signal a fixed-interval timer exception on a transition from 0 to 1. TCR[FPEXT]||TCR[FP] == 000000 selects TBU[32] (msb of TBU). TCRFP[EXT]||TCR[FP] == 111111 selects TBL[63] (lsb of TBL). 40 FIE Fixed-interval interrupt enable. 0 Fixed-interval interrupts disabled. 1 Fixed-interval interrupts enabled. 41 ARE Auto-reload enable. Controls whether the value in DECAR is reloaded into DEC when the DEC value reaches 0000_0001. 0 Auto-reload disabled. 1 Auto-reload enabled. 42 — Reserved, should be cleared. 43–46 WPEXT Watchdog timer period extension (see above description for WP). WPEXT | WP select one of the 64 TB bits used to signal a watchdog timer exception. |
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