UM0434 datasheet(19/390 Pages) STMICROELECTRONICS

19 / 390 page

UM0434

List of figures

19/391

Figure 49.

Burst read with Wait-State transfer, retraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281

Figure 50.

Burst write transfers, Single-Beat burst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281

Figure 51.

Read transfer with Wait-State, address retraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282

Figure 52.

Burst read with Wait-State transfer, retraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283

Figure 53.

Read and write Transfers: instruction read with error, data read, write, full pipelining . . . 284

Figure 54.

Data read with error, data write retracted, instruction read, full pipelining . . . . . . . . . . . . 285

Figure 55.

Misaligned write with error, data write retracted, burst read substituted, full pipelining . . 286

Figure 56.

Burst read with error termination, burst write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287

Figure 57.

Read transfer with Wait-State, address retraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288

Figure 58.

Burst read with Wait-State transfer, retraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288

Figure 59.

Wakeup control signal (p_wakeup). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289

Figure 60.

Interrupt interface input signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289

Figure 61.

Interrupt pending operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290

Figure 62.

Interrupt acknowledge operation case 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290

Figure 63.

Interrupt acknowledge operation case 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291

Figure 64.

Power management state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

Figure 65.

Core debug resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298

Figure 66.

Core debug resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306

Figure 67.

OnCE TAP controller and registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306

Figure 68.

OnCE controller as an FSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307

Figure 69.

OnCE controller and serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311

Figure 70.

CPU scan chain register (CPUSCR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320

Figure 71.

OnCE PC FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325

Figure 72.

Nexus3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331

Figure 73.

Resource full message format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353

Figure 74.

Program trace—indirect branch message (traditional) . . . . . . . . . . . . . . . . . . . . . . . . . . . 359

Figure 75.

Program trace—indirect branch message (history) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359

Figure 76.

Program trace—direct branch (traditional) and error messages. . . . . . . . . . . . . . . . . . . . 360

Figure 77.

Program Trace—Indirect branch with synchronization message . . . . . . . . . . . . . . . . . . . 360

Figure 78.

Data trace—data write message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365

Figure 79.

Data trace—data read with synchronization message . . . . . . . . . . . . . . . . . . . . . . . . . . . 365

Figure 80.

Error message (data trace only encoded) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365

Figure 81.

Watchpoint message and watchpoint error message . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367

Figure 82.

State diagram for single pin MSEO transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374

Figure 83.

Dual-Pin MSEO transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375

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