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STM32U375CE Datasheet(PDF) 136 Page - STMicroelectronics |
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STM32U375CE Datasheet(HTML) 136 Page - STMicroelectronics |
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136 / 222 page ![]() A device reset allows normal operations to be resumed. The test results are given in the table below. They are based on the EMS levels and classes defined in application note EMC design guide for STM8, STM32 and Legacy MCUs (AN1709). Table 81. EMS characteristics Symbol Parameter Conditions Level/ Class VFESD Voltage limits to be applied on any I/O pin to induce a functional disturbance VDD = 3.3 V, TA = 25°C, fHCLK = 96 MHz, LQFP100_SMPS package conforming to IEC 61000-4-2 2B VEFTB Fast transient voltage burst limits to be applied through 100 pF on VDD and VSS pins to induce a functional disturbance VDD = 3.3 V, TA = 25°C, fHCLK = 96 MHz, LQFP100_SMPS package conforming to IEC 61000-4-4 5A Designing hardened software to avoid noise problems The EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. Note that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for the application. Software recommendations The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical data corruption (control registers) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the oscillator pins for one second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring. See application note Software techniques for improving microcontrollers EMC performance (AN1015) for more details. Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling two LEDs through the I/O ports). This emission test is compliant with IEC 61967-2 standard that specifies the test board and the pin loading. Table 82. EMI characteristics for fHSE = 16 MHz and fHCLK = 96 MHz Symbol Parameter Conditions Monitored frequency band Value Unit SEMI Peak(1) VDD = 3.6 V, TA = 25 ° C, LQFP100_SMPS package compliant with IEC 61967-2 0.1 MHz to 30 MHz 22 dBμV 30 MHz to 130 MHz 10 130 MHz to 1 GHz 10 1 GHz to 2 GHz 18 Level(2) 0.1 MHz to 2 GHz 4 1. Refer to the EMI radiated test section of the application note EMC design guide for STM8, STM32 and Legacy MCUs (AN1709). 2. Refer to the EMI level classification section of the application note EMC design guide for STM8, STM32 and Legacy MCUs (AN1709). 5.3.12 Electrical sensitivity characteristics Based on three different tests (ESD, latch-up) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. STM32U375xx Electrical characteristics DS14861 - Rev 2 page 136/222 |
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