STM32U375CE datasheet(170/222 Pages) STMICROELECTRONICS

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Figure 57. SDMMC DDR mode

D output

tOV

tOH

tISU

tIH

D input

tOV

tOH

Valid data

tISU

tIH

Valid data

tW(CKH)

tW(CKL)

5.3.30

Delay block characteristics

Unless otherwise specified, the parameters given in Table 116 are derived from tests performed under the

ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 27.

Table 116. Delay block characteristics

Evaluated by characterization. Not tested in production.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tinit

Initial delay

560

1360

2560

tΔ

Unit delay

5.3.31

I2C interface characteristics

The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for:

•

Standard-mode (Sm): with a bitrate up to 100 Kbit/s

•

Fast-mode (Fm): with a bitrate up to 400 Kbit/s

•

Fast-mode Plus (Fm+): with a bitrate up to 1 Mbit/s

The I2C timings requirements are specified by design, not tested in production, when the I2C peripheral is

properly configured (refer to the product reference manual).

The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not

"true" open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDDIOx is

disabled, but is still present. Only FT_f I/O pins support Fm+ low-level output-current maximum requirement.

Refer to Table 86. I/O static characteristics for the I2C I/Os characteristics.

All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog filter characteristics.

Table 117. I2C analog filter characteristics

The measurement points are performed at 50% VDD.

Evaluated by characterization. Not tested in production.

Symbol

Parameter

Min

Max

Unit

tAF

Maximum pulse width of spikes that are suppressed by the analog filter

50(1)

160(2)

1. Spikes with widths below tAF min are filtered.

2. Spikes with width above tAF max are not filtered.

5.3.32

I3C interface characteristics

The I3C interface meets the timing requirements of the MIPI® I3C specification v1.1.

The I3C peripheral supports:

STM32U375xx

Electrical characteristics

DS14861 - Rev 2

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