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TUSB7340 Datasheet(PDF) 108 Page - Texas Instruments

Part # TUSB7340
Description  TUSB73x0 USB 3.0 xHCI Host Controller
PDF  122 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TUSB7340 Datasheet(HTML) 108 Page - Texas Instruments

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8.3.6.8 xHCI Supported Protocol Port Register (USB 3.0)
This register indicates how many USB 3.0 ports are supported and what their port numbers are.
xHCI Extended Capabilities Base register offset:28h
Register type: Read-Only
Default value: 0000 0X0Xh
Table 8-193. xHCI Extended Capabilities Register (xHCI Extended Capabilities Base + 28h)
Bit
No.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reset
State
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
No.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
State
0
0
0
0
0
x
x
0
0
0
0
0
0
x
x
1
Table 8-194. xHCI Supported Protocol Capability Register (USB 3.0) Description
BIT
FIELD NAME
ACCESS
DESCRIPTION
31:19
RSVD
r
Reserved. Returns zeros when read.
18
IHI
r
Integrated Hub Implemented. This field is 0 to indicate that the root hub
to external port mapping adheres to the default mapping in the xHCI
Specification.
17
HSO
r
High-speed Only. This field is not applicable to USB 3.0 and is 0.
16
L1C
r
L1 Capability. This field is not applicable to USB 3.0 and is 0.
15:8
COMPATIBLE_PORT_CNT
r
Compatible Port Count. For the TUSB7340 , this field is 04h to indicate
that four USB 3.0 ports are supported. For the TUSB7320, this field is
02h to indicate that two USB 3.0 ports are supported.
7:0
COMPATIBLE_PORT_OFF
r
Compatible Port Offset. For the TUSB7340 , this field is 05h to indicate
that the first USB 3.0 port is port 5. For the TUSB7320, this field is 03h to
indicate that the first USB 3.0 port is port 3.
8.4 MSI-X Memory Mapped Register Space
8.4.1 The MSI-X Table and PBA in Memory Mapped Register Space
The TUSB73X0 includes the MSI-X Table and PBA in memory mapped register space. These registers are
accessible through the address programmed into the Base Address Register 2/3. See the PCI Express Power
Management section for more information.
Table 8-195. MSI-X Table and PBA Register Map
REGISTER NAME
OFFSET
Entry 0 Message Address
0000h
Entry 0 Message Upper Address
0004h
Entry 0 Message Data
0008h
Entry 0 Vector Control
000Ch
Entry 1 Message Address
0010h
Entry 1 Message Upper Address
0014h
Entry 1 Message Data
0018h
Entry 1 Vector Control
001Ch
Entry 2 Message Address
0020h
Entry 2 Message Upper Address
0024h
Entry 2 Message Data
0028h
TUSB7320, TUSB7340
SLLSE76Q – MARCH 2011 – REVISED MARCH 2024
www.ti.com
108
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Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TUSB7320 TUSB7340



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