R5F72115D160FPV datasheet(421/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 397 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

TGFA

R/(W)*

Input Capture/Output Compare Flag A

Status flag that indicates the occurrence of TGRA input

capture or compare match. Only 0 can be written, for

flag clearing.

[Clearing conditions]

• When DMAC is activated by TGIA interrupt

• When 0 is written to TGFA after reading

TGFA = 1*

[Setting conditions]

• When TCNT = TGRA and TGRA is functioning as

output compare register

• When TCNT value is transferred to TGRA by input

capture signal and TGRA is functioning as input

capture register

Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.

2. When writing to the timer status register (TSR), write 0 to the bit to be cleared after

reading 1. Write 1 to other bits. But 1 is not actually written and the previous value is

held.

R5F72115D160FPV Datasheet(PDF) 421 Page - Renesas Technology Corp