R5F72115D160FPV datasheet(457/1228 Pages) RENESAS

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 433 of 1200

REJ09B0344-0200

10.3.29

Timer Interrupt Skipping Counter (TITCNT)

TITCNT is an 8-bit readable/writable counter. The MTU2 has one TITCNT. TITCNT retains its

value even after stopping the count operation of TCNT_3 and TCNT_4.

Bit:

Initial value:

R/W:

7654321

00000000

RRRRRRRR

3ACNT[2:0]

4VCNT[2:0]

Bit

Bit Name

Initial

Value

R/W

Description

—

Reserved

This bit is always read as 0.

6 to 4

3ACNT[2:0]

000

TGIA_3 Interrupt Counter

While the T3AEN bit in TITCR is set to 1, the count in

these bits is incremented every time a TGIA_3 interrupt

occurs.

[Clearing conditions]

• When the 3ACNT2 to 3ACNT0 value in TITCNT

matches the 3ACOR2 to 3ACOR0 value in TITCR

• When the T3AEN bit in TITCR is cleared to 0

• When the 3ACOR2 to 3ACOR0 bits in TITCR are

cleared to 0

—

Reserved

This bit is always read as 0.

2 to 0

4VCNT[2:0]

000

TCIV_4 Interrupt Counter

While the T4VEN bit in TITCR is set to 1, the count in

these bits is incremented every time a TCIV_4 interrupt

occurs.

[Clearing conditions]

• When the 4VCNT2 to 4VCNT0 value in TITCNT

matches the 4VCOR2 to 4VCOR2 value in TITCR

• When the T4VEN bit in TITCR is cleared to 0

• When the 4VCOR2 to 4VCOR2 bits in TITCR are

cleared to 0

Note:

To clear the TITCNT, clear the bits T3AEN and T4VEN in TITCR to 0.

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