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EP4CE40 Datasheet(PDF) 261 Page - Altera Corporation

Part # EP4CE40
Description  Cyclone IV Device Handbook, Volume 1
PDF  488 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP4CE40 Datasheet(HTML) 261 Page - Altera Corporation

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Chapter 10: JTAG Boundary-Scan Testing for Cyclone IV Devices
10–5
I/O Voltage Support in a JTAG Chain
December 2013
Altera Corporation
Cyclone IV Device Handbook,
Volume 1
EXTEST_PULSE
The instruction code for EXTEST_PULSE is 0010001111. The EXTEST_PULSE instruction
generates three output transitions:
■
Driver drives data on the falling edge of TCK in UPDATE_IR/DR.
■
Driver drives inverted data on the falling edge of TCK after entering the
RUN_TEST/IDLE state.
■
Driver drives data on the falling edge of TCK after leaving the RUN_TEST/IDLE
state.
1 If you use DC-coupling on HSSI signals, you must execute the EXTEST instruction. If
you use AC-coupling on HSSI signals, you must execute the EXTEST_PULSE
instruction. AC-coupled and DC-coupled HSSI are only supported in
post-configuration mode.
EXTEST_TRAIN
The instruction code for EXTEST_TRAIN is 0001001111. The EXTEST_TRAIN instruction
behaves the same as the EXTEST_PULSE instruction with one exception. The output
continues to toggle on the TCK falling edge as long as the test access port (TAP)
controller is in the RUN_TEST/IDLE state.
1 These two instruction codes are only supported in post-configuration mode for
Cyclone IV GX devices.
1 When you perform JTAG boundary-scan testing before configuration, the nCONFIG pin
must be held low.
I/O Voltage Support in a JTAG Chain
A Cyclone IV device operating in BST mode uses four required pins: TDI, TDO, TMS,
and TCK. The TDO output pin and all JTAG input pins are powered by the VCCIO power
supply of I/O Banks (I/O Bank 9 for Cyclone IV GX devices and I/O Bank 1 for
Cyclone IV E devices).
A JTAG chain can contain several different devices. However, you must use caution if
the chain contains devices that have different VCCIO levels. The output voltage level of
the TDO pin must meet the specification of the TDI pin it drives. For example, a device
with a 3.3-V TDO pin can drive a device with a 5.0-V TDI pin because 3.3 V meets the
minimum TTL-level VIH for the 5.0-V TDI pin.
1 For multiple devices in a JTAG chain with the 3.0-V/3.3-V I/O standard, you must
connect a 25-
Ω series resistor on a TDO pin driving a TDI pin.
You can also interface the TDI and TDO lines of the devices that have different VCCIO
levels by inserting a level shifter between the devices. If possible, the JTAG chain
should have a device with a higher VCCIO level driving a device with an equal or
lower VCCIO level. This way, a level shifter may be required only to shift the TDO level
to a level acceptable to the JTAG tester.



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