R5F72115D160FPV datasheet(434/1228 Pages) RENESAS

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 410 of 1200

REJ09B0344-0200

10.3.13

Timer Counter (TCNT)

The TCNT counters are 16-bit readable/writable counters. The MTU2 has eight TCNT counters,

one each for channels 0 to 4 and three (TCNTU_5, TCNTV_5, and TCNTW_5) for channel 5.

The TCNT counters are initialized to H'0000 by a reset.

Bit:

Initial value:

R/W:

987654321

0000000000000000

R/W

Note:

The TCNT counters must not be accessed in eight bits; they should always be accessed in 16 bits.

10.3.14

Timer General Register (TGR)

The TGR registers are 16-bit readable/writable registers. The MTU2 has 21 TGR registers, six for

channel 0, two each for channels 1 and 2, four each for channels 3 and 4, and three for channel 5.

TGRA, TGRB, TGRC, and TGRD function as either output compare or input capture registers.

TGRC and TGRD for channels 0, 3, and 4 can also be designated for operation as buffer registers.

TGR buffer register combinations are TGRA and TGRC, and TGRB and TGRD.

TGRE_0 and TGRF_0 function as compare registers. When the TCNT_0 count matches the

TGRE_0 value, an A/D converter start request can be issued. TGRF can also be designated for

operation as a buffer register. TGR buffer register combination is TGRE and TGRF.

TGRU_5, TGRV_5, and TGRW_5 function as compare match, input capture, or external pulse

width measurement registers.

Bit:

Initial value:

R/W:

987654321

1111111111111111

R/W

Note:

The TGR registers must not be accessed in eight bits; they should always be accessed in 16 bits.

TGR registers are initialized to H'FFFF.

R5F72115D160FPV Datasheet(PDF) 434 Page - Renesas Technology Corp