R5F72115D160FPV datasheet(451/1228 Pages) RENESAS

451 / 1228 page

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 427 of 1200

REJ09B0344-0200

Figure 10.3 shows an example of the PWM output level setting procedure in buffer operation.

Set bit TOCS

Set TOCR2

Set TOLBR

[1]

[2]

[3]

[1] Set bit TOCS in TOCR1 to 1 to enable the TOCR2 setting.

[2] Use bits BF1 and BF0 in TOCR2 to select the TOLBR buffer

transfer timing. Use bits OLS3N to OLS1N and OLS3P to OLS1P

to specify the PWM output levels.

[3] The TOLBR initial setting must be the same value as specified in

bits OLS3N to OLS1N and OLS3P to OLS1P in TOCR2.

Figure 10.3 PWM Output Level Setting Procedure in Buffer Operation

10.3.23

Timer Gate Control Register (TGCR)

TGCR is an 8-bit readable/writable register that controls the waveform output necessary for

brushless DC motor control in reset-synchronized PWM mode/complementary PWM mode. These

synchronized PWM mode.

Bit:

Initial value:

R/W:

7654321

10000000

R/W

BDC

Bit

Bit Name

Initial

value

R/W

Description

—

Reserved

This bit is always read as 1. The write value should

always be 1.

BDC

R/W

Brushless DC Motor

This bit selects whether to make the functions of this

0: Ordinary output

1: Functions of this register are made effective

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