R5F72115D160FPV datasheet(101/1228 Pages) RENESAS

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Section 5 Exception Handling

Rev. 2.00 May. 08, 2008 Page 77 of 1200

REJ09B0344-0200

Section 5 Exception Handling

5.1

Overview

5.1.1

Types of Exception Handling and Priority

Exception handling is started by sources, such as resets, address errors, register bank errors,

interrupts, and instructions. Table 5.1 shows their priorities. When several exception handling

sources occur at once, they are processed according to the priority shown.

Table 5.1

Types of Exception Handling and Priority Order

Type

Exception Handling

Priority

Power-on reset

Reset

Manual reset

CPU address error

Address

error

DMAC address error

Integer division exception (division by zero)

Instruction

Integer division exception (overflow)

Bank underflow

bank error

Bank overflow

NMI

User break

H-UDI

IRQ

A/D converter (ADC)

Direct memory access controller (DMAC)

Compare match timer (CMT)

Bus state controller (BSC)

Watchdog timer (WDT)

Multi-function timer pulse unit 2 (MTU2)

Interrupt

On-chip peripheral modules

Port output enable 2 (POE2): OEI1 and

OEI2 interrupts

High

Low

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