R5F72115D160FPV datasheet(105/1228 Pages) RENESAS

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Section 5 Exception Handling

Rev. 2.00 May. 08, 2008 Page 81 of 1200

REJ09B0344-0200

5.1.3

Exception Handling Vector Table

Before exception handling begins running, the exception handling vector table must be set in

memory. The exception handling vector table stores the start addresses of exception service

routines. (The reset exception handling table holds the initial values of PC and SP.)

All exception sources are given different vector numbers and vector table address offsets, from

which the vector table addresses are calculated. During exception handling, the start addresses of

the exception service routines are fetched from the exception handling vector table, which is

indicated by this vector table address.

Table 5.3 shows the vector numbers and vector table address offsets. Table 5.4 shows how vector

table addresses are calculated.

Table 5.3

Exception Handling Vector Table

Exception Sources

Vector

Numbers

Vector Table Address Offset

H'00000000 to H'00000003

Power-on reset

H'00000004 to H'00000007

H'00000008 to H'0000000B

Manual reset

H'0000000C to H'0000000F

General illegal instruction

H'00000010 to H'00000013

(Reserved by system)

H'00000014 to H'00000017

Slot illegal instruction

H'00000018 to H'0000001B

H'0000001C to H'0000001F

(Reserved by system)

H'00000020 to H'00000023

CPU address error

H'00000024 to H'00000027

DMAC address error

H'00000028 to H'0000002B

NMI

H'0000002C to H'0000002F

Interrupts

User break

H'00000030 to H'00000033

(Reserved by system)

H'00000034 to H'00000037

H-UDI

H'00000038 to H'0000003B

Bank overflow

H'0000003C to H'0000003F

Bank underflow

H'00000040 to H'00000043

R5F72115D160FPV Datasheet(PDF) 105 Page - Renesas Technology Corp

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