R5F72115D160FPV datasheet(131/1228 Pages) RENESAS

131 / 1228 page

Section 6 Interrupt Controller (INTC)

Rev. 2.00 May. 08, 2008 Page 107 of 1200

REJ09B0344-0200

6.3.2

Interrupt Control Register 0 (ICR0)

ICR0 is a 16-bit register that sets the input signal detection mode for the external interrupt input

pin NMI, and indicates the input level at the NMI pin. ICR0 is initialized by a power-on reset.

000000000000000

RRRRRRR

R/W

RRRRRRRR

Bit:

Initial value:

R/W:

Note:

1 when the NMI pin is high, and 0 when the NMI pin is low.

NMIL

NMIE

Bit

Bit Name

Initial

Value

R/W

Description

NMIL

NMI Input Level

Sets the level of the signal input at the NMI pin. The

NMI pin level can be obtained by reading this bit. This

bit cannot be modified.

0: Low level is input to NMI pin

1: High level is input to NMI pin

14 to 9

⎯

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

NMIE

R/W

NMI Edge Select

Selects whether the falling or rising edge of the

interrupt request signal on the NMI pin is detected.

0: Interrupt request is detected on falling edge of NMI

input

1: Interrupt request is detected on rising edge of NMI

input

7 to 0

⎯

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

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