 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
R5F72115D160FPV Datasheet(PDF) 133 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R5F72115D160FPV Datasheet(HTML) 133 Page - Renesas Technology Corp |
|
|
133 / 1228 page  Section 6 Interrupt Controller (INTC) Rev. 2.00 May. 08, 2008 Page 109 of 1200 REJ09B0344-0200 6.3.4 IRQ Interrupt Request Register (IRQRR) IRQRR is a 16-bit register that indicates interrupt requests from external input pins IRQ7 to IRQ0. If edge detection is set for the IRQ7 to IRQ0 interrupts, writing 0 to the IRQ7F to IRQ0F bits after reading IRQ7F to IRQ0F = 1 cancels the retained interrupts. IRQRR is initialized by a power-on reset. 15 14 13 12 11 10 987654321 0 00000000 R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* Note: Only 0 can be written to clear the flag after 1 is read. * Bit: Initial value: R/W: 00000000 RRRRRRRR -------- IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F Bit Bit Name Initial Value R/W Description 15 to 8 ⎯ All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
