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R5F72115D160FPV Datasheet(PDF) 183 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 183 Page - Renesas Technology Corp

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Section 7 User Break Controller (UBC)
Rev. 2.00 May. 08, 2008 Page 159 of 1200
REJ09B0344-0200
7.3.11
Break Address Mask Register_3 (BAMR_3)
BAMR_3 is a 32-bit readable/writable register. BAMR_3 specifies bits masked in the break
address bits specified by BAR_3. BAMR_3 is initialized to H'00000000 by a power-on reset, but
retains its previous value by a manual reset or in software standby mode or sleep mode.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
BAM3_31 BAM3_30 BAM3_29 BAM3_28 BAM3_27 BAM3_26 BAM3_25 BAM3_24 BAM3_23 BAM3_22 BAM3_21 BAM3_20 BAM3_19 BAM3_18 BAM3_17 BAM3_16
BAM3_15 BAM3_14 BAM3_13 BAM3_12 BAM3_11 BAM3_10 BAM3_9
BAM3_8
BAM3_7
BAM3_6
BAM3_5
BAM3_4
BAM3_3
BAM3_2
BAM3_1
BAM3_0
Bit
Bit Name
Initial
Value
R/W
Description
31 to 0
BAM3_31 to
BAM3_0
All 0
R/W
Break Address Mask 3
Specify bits masked in the channel-3 break address
bits specified by BAR_3 (BA3_31 to BA3_0).
0: Break address bit BA3_n is included in the break
condition
1: Break address bit BA3_n is masked and not
included in the break condition
Note:
n = 31 to 0



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