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EP4CE40 Datasheet(PDF) 147 Page - Altera Corporation |
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EP4CE40 Datasheet(HTML) 147 Page - Altera Corporation |
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147 / 488 page ![]() CYIV-51007-2.5 © 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. Cyclone IV Device Handbook, Volume 1 May 2013 Feedback Subscribe ISO 9001:2008 Registered 7. External Memory Interfaces in Cyclone IV Devices This chapter describes the memory interface pin support and the external memory interface features of Cyclone® IV devices. In addition to an abundant supply of on-chip memory, Cyclone IV devices can easily interface with a broad range of external memory devices, including DDR2 SDRAM, DDR SDRAM, and QDR II SRAM. External memory devices are an important system component of a wide range of image processing, storage, communications, and general embedded applications. 1 Altera recommends that you construct all DDR2 or DDR SDRAM external memory interfaces using the Altera® ALTMEMPHY megafunction. You can implement the controller function using the Altera DDR2 or DDR SDRAM memory controllers, third-party controllers, or a custom controller for unique application needs. Cyclone IV devices support QDR II interfaces electrically, but Altera does not supply controller or physical layer (PHY) megafunctions for QDR II interfaces. This chapter includes the following sections: ■ “Cyclone IV Devices Memory Interfaces Pin Support” on page 7–2 ■ “Cyclone IV Devices Memory Interfaces Features” on page 7–12 f For more information about supported maximum clock rate, device and pin planning, IP implementation, and device termination, refer to the External Memory Interface Handbook. May 2013 CYIV-51007-2.5 |
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