EP4CE40 datasheet(162/488 Pages) ALTERA

162 / 488 page

7–16

Chapter 7: External Memory Interfaces in Cyclone IV Devices

Document Revision History

Cyclone IV Device Handbook,

May 2013

Altera Corporation

Volume 1

f For more information about Cyclone IV PLL, refer to the Clock Networks and PLLs in

Cyclone IV Devices chapter.

Document Revision History

Table 7–3 lists the revision history for this chapter.

Table 7–3. Document Revision History

Date

Version

Changes

May 2013

2.5

Updated Table 7–2 to add new device options and packages.

February 2013

2.4

Updated Table 7–2 to add new device options and packages.

October 2012

2.3

Updated Table 7–1 and Table 7–2.

December 2010

2.2

■ Updated for the Quartus II software version 10.1 release.

■ Added Cyclone IV E new device package information.

■ Updated Table 7–2.

■ Minor text edits.

November 2010

2.1

Updated “Data and Data Clock/Strobe Pins” section.

February 2010

2.0

■ Added Cyclone IV E devices information for the Quartus II software version 9.1 SP1

release.

■ Updated Table 7–1.

■ Added Table 7–2.

■ Added Figure 7–5 and Figure 7–6.

November 2009

1.0

Initial release.

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